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We have a Clock signal (X_clk). On every posedge of this X_clk we check for transition (low to high) of another signal (R_cmd). Once this transition occurs, After T1 edges of X_Clk there should be a transition observed on another signal (PD). This checker is the timing checker for PD. Now once transition (high to low) of PD signal is observed then the check of another transition (Low to High) of the PD signal itself which should occur after D1 edges of X_Clk. This checker is the Duration checker for PD. Write the assertion based checker for both Timing and Duration checker. |
