Hugging Face
Models
Datasets
Spaces
Community
Docs
Enterprise
Pricing
Log In
Sign Up
Nellyw888
/
VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb
like
1
Reinforcement Learning
Transformers
Safetensors
llama
text-generation
verilog
reasoning
rtl
text-generation-inference
arxiv:
2505.11849
Model card
Files
Files and versions
Community
Train
Deploy
Use this model
28ed329
VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb
Ctrl+K
Ctrl+K
1 contributor
History:
3 commits
Nellyw888
Upload LlamaForCausalLM
28ed329
verified
25 days ago
.gitattributes
Safe
1.52 kB
initial commit
26 days ago
README.md
Safe
5.17 kB
Upload LlamaForCausalLM
26 days ago
config.json
Safe
679 Bytes
Upload LlamaForCausalLM
26 days ago
generation_config.json
Safe
133 Bytes
Upload LlamaForCausalLM
26 days ago
model-00001-of-00006.safetensors
Safe
4.84 GB
LFS
Upload LlamaForCausalLM
25 days ago
model-00002-of-00006.safetensors
Safe
4.86 GB
LFS
Upload LlamaForCausalLM
25 days ago
model-00003-of-00006.safetensors
Safe
4.86 GB
LFS
Upload LlamaForCausalLM
25 days ago
model-00004-of-00006.safetensors
Safe
4.86 GB
LFS
Upload LlamaForCausalLM
25 days ago
model-00005-of-00006.safetensors
Safe
4.86 GB
LFS
Upload LlamaForCausalLM
25 days ago
model-00006-of-00006.safetensors
Safe
2.68 GB
LFS
Upload LlamaForCausalLM
25 days ago
model.safetensors.index.json
Safe
24 kB
Upload LlamaForCausalLM
26 days ago