Dataset Viewer
Auto-converted to Parquet
text
stringlengths
64
2.42M
id
stringlengths
10
118
metadata
dict
__index_level_0__
int64
0
65
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ #include <iostream> #include <vector> #include "cutlass/cutlass.h" #include "cutlass/layout/matrix.h" #include "cutlass/gemm/device/gemm_array.h" #include "cutlass/gemm/device/gemm_batched.h" #pragma warning( disable : 4503) /* This example demonstrates how to use cutlass to compute a batched strided gemm in two different ways: 1. By specifying pointers to the first matrices of the batch and the stride between the consecutive matrices of the batch (this is called a strided batched gemm). 2. By copying pointers to all matrices of the batch to the device memory (this is called an array gemm). In this example, both A and B matrix are non-transpose and column major matrix batched_C = batched_A x batched_B As an example, matrix C can be seen as ----------------------------------------------------------- (0,0,0) | (0,0,1) | (0,0,2) | (1,0,0) | (1,0,1) | (1,0,2) | ----------------------------------------------------------- (0,1,0) | (0,1,1) | (0,1,2) | (1,1,0) | (1,1,1) | (1,1,2) | ----------------------------------------------------------- (0,2,0) | (0,2,1) | (0,2,2) | (1,2,0) | (1,2,1) | (1,2,2) | ----------------------------------------------------------- (0,3,0) | (0,3,1) | (0,3,2) | (1,3,0) | (1,3,1) | (1,3,2) | ----------------------------------------------------------- (0,4,0) | (0,4,1) | (0,4,2) | (1,4,0) | (1,4,1) | (1,4,2) | ----------------------------------------------------------- (0,5,0) | (0,5,1) | (0,5,2) | (1,5,0) | (1,5,1) | (1,5,2) | ----------------------------------------------------------- batch 0 | batch 1 where we denote each element with (batch_idx, row_idx, column_idx) In this example, batch size is 2, M is 6 and N is 3 The stride (batch_stride_C) between the first element of two batches is ldc * n matrix A can be seen as --------------------------------------- (0,0,0) | (0,0,1) | (1,0,0) | (1,0,1) | --------------------------------------- (0,1,0) | (0,1,1) | (1,1,0) | (1,1,1) | --------------------------------------- (0,2,0) | (0,2,1) | (1,2,0) | (1,2,1) | --------------------------------------- (0,3,0) | (0,3,1) | (1,3,0) | (1,3,1) | --------------------------------------- (0,4,0) | (0,4,1) | (1,4,0) | (1,4,1) | --------------------------------------- (0,5,0) | (0,5,1) | (1,5,0) | (1,5,1) | --------------------------------------- batch 0 | batch 1 , where batch size is 2, M is 6 and K is 2 The stride (batch_stride_A) between the first element of two batches is lda * k matrix B can be seen as ----------------------------- (0,0,0) | (0,0,1) | (0,0,2) | ----------------------------- batch 0 (0,1,0) | (0,1,1) | (0,1,2) | ------------------------------------- (1,0,0) | (1,0,1) | (1,0,2) | ----------------------------- batch 1 (1,1,0) | (1,1,1) | (1,1,2) | ----------------------------- , where the batch size is 2, N is 3 and K is 2 The stride (batch_stride_B) between the first element of two batches is k */ cudaError_t cutlass_array_sgemm( int m, int n, int k, float alpha, float const * const *A, int lda, float const * const *B, int ldb, float * const *C, int ldc, float beta, int batch_count) { using Gemm = cutlass::gemm::device::GemmArray< float, cutlass::layout::ColumnMajor, float, cutlass::layout::ColumnMajor, float, cutlass::layout::ColumnMajor >; Gemm gemm_op; cutlass::Status status = gemm_op({ {m, n, k}, A, lda, B, ldb, C, ldc, C, ldc, {alpha, beta}, batch_count }); if (status != cutlass::Status::kSuccess) { return cudaErrorUnknown; } return cudaSuccess; } cudaError_t cutlass_strided_batched_sgemm( int m, int n, int k, float alpha, float const *A, int lda, long long int batch_stride_A, float const *B, int ldb, long long int batch_stride_B, float *C, int ldc, long long int batch_stride_C, float beta, int batch_count) { using Gemm = cutlass::gemm::device::GemmBatched< float, cutlass::layout::ColumnMajor, float, cutlass::layout::ColumnMajor, float, cutlass::layout::ColumnMajor >; Gemm gemm_op; cutlass::Status status = gemm_op({ {m, n, k}, {A, lda}, batch_stride_A, {B, ldb}, batch_stride_B, {C, ldc}, batch_stride_C, {C, ldc}, batch_stride_C, {alpha, beta}, batch_count }); if (status != cutlass::Status::kSuccess) { return cudaErrorUnknown; } return cudaSuccess; } template<typename T> cudaError_t strided_batched_gemm_nn_reference( int m, int n, int k, T alpha, std::vector<T> const &A, int lda, long long int batch_stride_A, std::vector<T> const &B, int ldb, long long int batch_stride_B, std::vector<T> &C, int ldc, long long int batch_stride_C, T beta, int batch_count) { /* strided batched gemm NN */ cudaError_t result = cudaSuccess; if (A.size() < size_t(lda * k * batch_count)) { std::cout << "the size of A is too small" << std::endl; return cudaErrorInvalidValue; } if (B.size() < size_t(ldb * n)) { std::cout << "the size of B is too small" << std::endl; return cudaErrorInvalidValue; } if (C.size() < size_t(ldc * n * batch_count)) { std::cout << "the size of C is too small" << std::endl; return cudaErrorInvalidValue; } for (int batch_idx = 0; batch_idx < batch_count; batch_idx++) { for (int n_idx = 0; n_idx < n; n_idx++) { for (int m_idx = 0; m_idx < m; m_idx++) { T accum = beta * C[batch_idx * batch_stride_C + n_idx * ldc + m_idx]; for (int k_idx = 0; k_idx < k; k_idx++) { accum += alpha * A[batch_idx * batch_stride_A + k_idx * lda + m_idx] * B[batch_idx * batch_stride_B + n_idx * ldb + k_idx]; } C[batch_idx * batch_stride_C + n_idx * ldc + m_idx] = accum; } } } return result; } cudaError_t run_batched_gemm(bool use_array) { const char* gemm_desc = use_array ? "array" : "strided batched"; std::cout << "Running " << gemm_desc << " gemm" << std::endl; // Arbitrary problem size int const m = 520; int const n = 219; int const k = 129; int const batch_count = 17; // A, B are non-transpose, column major int const lda = m; int const ldb = k * batch_count; int const ldc = m; int const count_A = batch_count * lda * k; int const count_B = ldb * n; int const count_C = batch_count * ldc * n; // the memory is batched along K dimension long long int batch_stride_A = static_cast<long long int>(lda) * static_cast<long long int>(k); long long int batch_stride_B = static_cast<long long int>(k); long long int batch_stride_C = static_cast<long long int>(ldc) * static_cast<long long int>(n); // alpha and beta float alpha = 1.0f; float beta = 2.0f; cudaError_t result = cudaSuccess; // allocate the host memory std::vector<float> host_A(count_A); std::vector<float> host_B(count_B); std::vector<float> host_C(count_C); std::vector<float> result_C(count_C); // allocate the device memory float *A; float *B; float *C; result = cudaMalloc(&A, count_A * sizeof(float)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } result = cudaMalloc(&B, count_B * sizeof(float)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } result = cudaMalloc(&C, count_C * sizeof(float)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } // Limit range to avoid floating-point errors int const kRange = 8; // fill A for (int b_idx = 0; b_idx < batch_count; b_idx++) { for (int col_idx = 0; col_idx < k; col_idx++) { for (int row_idx = 0; row_idx < m; row_idx++) { host_A[row_idx + col_idx * lda + b_idx * lda * k] = static_cast<float>((row_idx + col_idx * lda + b_idx * lda * k) % kRange); } } } // fill B for (int b_idx = 0; b_idx < batch_count; b_idx++) { for (int col_idx = 0; col_idx < n; col_idx++) { for (int row_idx = 0; row_idx < k; row_idx++) { host_B[row_idx + col_idx * ldb + b_idx * k] = static_cast<float>(((n + k * ldb + batch_count * k) - (row_idx + col_idx * ldb + b_idx * k)) % kRange); } } } // fill C for (int b_idx = 0; b_idx < batch_count; b_idx++) { for (int col_idx = 0; col_idx < n; col_idx++) { for (int row_idx = 0; row_idx < m; row_idx++) { host_C[row_idx + col_idx * ldc + b_idx * ldc * n] = 1.f; } } } // ref memory std::vector<float> ref_A(host_A); std::vector<float> ref_B(host_B); std::vector<float> ref_C(host_C); // copy host memory to device result = cudaMemcpy(A, host_A.data(), count_A * sizeof(float), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } result = cudaMemcpy(B, host_B.data(), count_B * sizeof(float), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } result = cudaMemcpy(C, host_C.data(), count_C * sizeof(float), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } // run cutlass if (use_array) { // allocate the host memory for the pointers to the matrices of the batch std::vector<float*> host_ptr_A(batch_count); std::vector<float*> host_ptr_B(batch_count); std::vector<float*> host_ptr_C(batch_count); // permute the batch elements to emphasize that GemmArray does not depend on matrices being separated by a fixed stride std::vector<size_t> permutation = {14, 11, 3, 10, 1, 13, 9, 4, 6, 16, 8, 15, 7, 12, 0, 2, 5}; for (size_t b_idx = 0; b_idx < batch_count; b_idx++) { host_ptr_A[b_idx] = A + permutation[b_idx] * batch_stride_A; host_ptr_B[b_idx] = B + permutation[b_idx] * batch_stride_B; host_ptr_C[b_idx] = C + permutation[b_idx] * batch_stride_C; } // allocate the corresponding device memory float const **ptr_A; float const **ptr_B; float **ptr_C; result = cudaMalloc(&ptr_A, batch_count * sizeof(float*)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } result = cudaMalloc(&ptr_B, batch_count * sizeof(float*)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } result = cudaMalloc(&ptr_C, batch_count * sizeof(float*)); if (result != cudaSuccess) { std::cerr << "cudaMalloc result = " << result << std::endl; return result; } // copy the matrix pointers to the device result = cudaMemcpy(ptr_A, host_ptr_A.data(), batch_count * sizeof(float*), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } result = cudaMemcpy(ptr_B, host_ptr_B.data(), batch_count * sizeof(float*), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } result = cudaMemcpy(ptr_C, host_ptr_C.data(), batch_count * sizeof(float*), cudaMemcpyHostToDevice); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } result = cutlass_array_sgemm(m, n, k, alpha, ptr_A, lda, ptr_B, ldb, ptr_C, ldc, beta, batch_count); if (result != cudaSuccess) return result; } else { result = cutlass_strided_batched_sgemm( m, n, k, alpha, A, lda, batch_stride_A, B, ldb, batch_stride_B, C, ldc, batch_stride_C, beta, batch_count); if (result != cudaSuccess) return result; } // copy device memory to host result = cudaMemcpy(result_C.data(), C, count_C * sizeof(float), cudaMemcpyDeviceToHost); if (result != cudaSuccess) { std::cerr << "cudaMemcpy result = " << result << std::endl; return result; } //compare with reference code result = strided_batched_gemm_nn_reference(m, n, k, alpha, ref_A, lda, batch_stride_A, ref_B, ldb, batch_stride_B, ref_C, ldc, batch_stride_C, beta, batch_count); if (result != 0) return result; // Expect bit-level accuracy for this simple example if (ref_C != result_C) { std::cout << "CUTLASS " << gemm_desc << " gemm does not run correctly" << std::endl; return cudaErrorUnknown; } // free memory result = cudaFree(A); if (result != cudaSuccess) { std::cerr << "cudaFree result = " << result << std::endl; return result; } result = cudaFree(B); if (result != cudaSuccess) { std::cerr << "cudaFree result = " << result << std::endl; return result; } result = cudaFree(C); if (result != cudaSuccess) { std::cerr << "cudaFree result = " << result << std::endl; return result; } return result; } int main() { cudaError_t result = cudaSuccess; for (bool use_array : {false, true}) { result = run_batched_gemm(use_array); if (result == cudaSuccess) { std::cout << "Passed." << std::endl; } else { break; } } // Exit. return result == cudaSuccess ? 0 : -1; }
examples/05_batched_gemm/batched_gemm.cu/0
{ "file_path": "examples/05_batched_gemm/batched_gemm.cu", "repo_id": "examples", "token_count": 6001 }
0
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ #include <iostream> #include "cutlass/cutlass.h" #include "cutlass/gemm/device/gemm.h" #include "cutlass/util/host_tensor.h" #include "cutlass/util/tensor_view_io.h" #include "cutlass/util/reference/host/tensor_fill.h" #include "cutlass/util/reference/host/tensor_copy.h" #include "cutlass/util/reference/host/tensor_compare.h" #include "cutlass/util/reference/host/gemm.h" #include "device/b2b_gemm.h" #include "b2b_gemm_run.h" #include "test_run.h" //////////////////////////////////////////////////////////////////////////////// cutlass::gemm::GemmCoord gemm_f16_sm75_problem_size_0(128*640, 64, 576); cutlass::gemm::GemmCoord gemm_f16_sm75_problem_size_1(128*640, 128, 64); bool run_nonfused_gemm_f16() { using ElementOutput = cutlass::half_t; using ElementAccumulator = cutlass::half_t; using ElementCompute = cutlass::half_t; ElementCompute alpha0 = ElementCompute(1); ElementCompute beta0 = ElementCompute(1); //beta = 1 for bias ElementCompute alpha1 = ElementCompute(1); ElementCompute beta1 = ElementCompute(1); //beta = 1 for bias using ThreadblockShape0 = cutlass::gemm::GemmShape<64, 64, 32>; using WarpShape0 = cutlass::gemm::GemmShape<32, 32, 32>; using ThreadblockShape1 = cutlass::gemm::GemmShape<64, 128, 32>; using WarpShape1 = cutlass::gemm::GemmShape<32, 64, 32>; using InstructionShape = cutlass::gemm::GemmShape<16, 8, 8>; using Gemm0 = cutlass::gemm::device::Gemm< cutlass::half_t, cutlass::layout::RowMajor, cutlass::half_t, cutlass::layout::ColumnMajor, ElementOutput, cutlass::layout::RowMajor, ElementAccumulator, cutlass::arch::OpClassTensorOp, cutlass::arch::Sm75, ThreadblockShape0, WarpShape0, InstructionShape, cutlass::epilogue::thread::LinearCombinationRelu< ElementOutput, 128 / cutlass::sizeof_bits<ElementOutput>::value, ElementAccumulator, ElementCompute, cutlass::epilogue::thread::ScaleType::NoBetaScaling >, cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle<1>, 2 >; using Gemm1 = cutlass::gemm::device::Gemm< cutlass::half_t, cutlass::layout::RowMajor, cutlass::half_t, cutlass::layout::ColumnMajor, ElementOutput, cutlass::layout::RowMajor, ElementAccumulator, cutlass::arch::OpClassTensorOp, cutlass::arch::Sm75, ThreadblockShape1, WarpShape1, InstructionShape, cutlass::epilogue::thread::LinearCombinationRelu< ElementOutput, 128 / cutlass::sizeof_bits<ElementOutput>::value, ElementAccumulator, ElementCompute, cutlass::epilogue::thread::ScaleType::NoBetaScaling >, cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle<1>, 2 >; B2bNonFusedGemmRun<Gemm0, Gemm1> nonFusedGemm; std::cout << "Running Non-fused back-to-back FP16 TN GEMMs...\n"; bool pass = nonFusedGemm.run(gemm_f16_sm75_problem_size_0, gemm_f16_sm75_problem_size_1, alpha0, beta0, alpha1, beta1); if(pass) std::cout << "Pass\n"; else std::cout << "Fail\n"; return pass; } bool run_fused_gemm_f16_rf_res() { using ElementOutput = cutlass::half_t; using ElementAccumulator = cutlass::half_t; using ElementCompute = cutlass::half_t; ElementCompute alpha0 = ElementCompute(1); //Fused kernel has built-in bias, setting beta=0 ElementCompute beta0 = ElementCompute(0); ElementCompute alpha1 = ElementCompute(1); ElementCompute beta1 = ElementCompute(1); //beta=1 for bias using ThreadblockShape0 = cutlass::gemm::GemmShape<64, 64, 32>; using WarpShape0 = cutlass::gemm::GemmShape<32, 64, 32>; using ThreadblockShape1 = cutlass::gemm::GemmShape<64, 128, 32>; using WarpShape1 = cutlass::gemm::GemmShape<32, 128, 32>; using InstructionShape = cutlass::gemm::GemmShape<16, 8, 8>; using EpilogueOutputOp0 = cutlass::epilogue::thread::LinearCombinationRelu< ElementOutput, InstructionShape::kM * InstructionShape::kN / 32, ElementAccumulator, ElementCompute, cutlass::epilogue::thread::ScaleType::OnlyAlphaScaling >; using EpilogueOutputOp1 = cutlass::epilogue::thread::LinearCombinationRelu< ElementOutput, 128 / cutlass::sizeof_bits<ElementOutput>::value, ElementAccumulator, ElementCompute, cutlass::epilogue::thread::ScaleType::NoBetaScaling >; using B2bGemm = cutlass::gemm::device::B2bGemm< cutlass::half_t, cutlass::layout::RowMajor, cutlass::half_t, cutlass::layout::ColumnMajor, ElementOutput, cutlass::layout::RowMajor, ElementAccumulator, cutlass::arch::OpClassTensorOp, cutlass::arch::Sm75, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, EpilogueOutputOp0, EpilogueOutputOp1, cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle<1>, 2 >; B2bFusedGemmRun<B2bGemm> fusedGemm; std::cout << "Running Fused back-to-back FP16 TN GEMMs with RF Residency...\n"; bool passed = fusedGemm.run(gemm_f16_sm75_problem_size_0, gemm_f16_sm75_problem_size_1, alpha0, beta0, alpha1, beta1); if(passed) std::cout << "Pass\n"; else std::cout << "Fail\n"; return passed; } int main() { std::vector<bool (*)()>funcs = { &run_nonfused_gemm_f16, &run_fused_gemm_f16_rf_res }; return testRun(75, funcs, "gemm f16 RF residency"); } ///////////////////////////////////////////////////////////////////////////////
examples/13_two_tensor_op_fusion/fused_two_gemms_f16_sm75_rf.cu/0
{ "file_path": "examples/13_two_tensor_op_fusion/fused_two_gemms_f16_sm75_rf.cu", "repo_id": "examples", "token_count": 2640 }
1
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ /*! \file \brief Default kernel-level implicit GEMM convolution definitions combine threadblock-scoped matrix multiply-add with the appropriate threadblock-scoped epilogue. */ #pragma once #include "cutlass/cutlass.h" #include "cutlass/conv/kernel/default_conv2d.h" #include "cutlass/conv/threadblock/conv2d_fprop_activation_tile_access_iterator_analytic.h" #include "cutlass/conv/threadblock/conv2d_fprop_filter_tile_access_iterator_analytic.h" #include "cutlass/conv/threadblock/conv2d_fprop_activation_tile_access_iterator_optimized.h" #include "cutlass/conv/threadblock/conv2d_fprop_filter_tile_access_iterator_optimized.h" #include "cutlass/transform/threadblock/predicated_vector_access_iterator.h" #include "cutlass/transform/threadblock/vector_iterator.h" #include "cutlass/transform/warp/vector_fragment_iterator.h" #include "cutlass/gemm/warp/mma_tensor_op_fragment_iterator.h" #include "kernel/default_b2b_conv2d_fprop.h" #include "kernel/b2b_implicit_gemm_convolution.h" #include "threadblock/b2b_implicit_gemm_multistage_smem_accumulator.h" ///////////////////////////////////////////////////////////////////////////////////////////////// namespace cutlass { namespace conv { namespace kernel { ///////////////////////////////////////////////////////////////////////////////////////////////// /// Defines a kernel for Conv2dFprop specialization for Analytic IteratorAlgorithm and multistage /// pipeline. /// Accumulator will be staged in shared memory. template < typename ElementA, typename LayoutA, typename ElementB, typename LayoutB, typename ElementC, typename LayoutC, typename ElementAccumulator, typename ArchTag, typename ThreadblockShape0, typename ThreadblockShape1, typename WarpShape0, typename WarpShape1, typename InstructionShape, typename EpilogueOutputOp0, typename EpilogueOutputOp1, typename ThreadblockSwizzle, int Stages, typename MathOperatorTag > struct DefaultB2bConv2dFprop < ElementA, LayoutA, ElementB, LayoutB, ElementC, LayoutC, ElementAccumulator, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, EpilogueOutputOp0, EpilogueOutputOp1, ThreadblockSwizzle, Stages, MathOperatorTag, IteratorAlgorithm::kAnalytic, true > { // Define the core components from GEMM using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, layout::RowMajor, ElementB, layout::ColumnMajor, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, MathOperatorTag>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, layout::RowMajor, ElementB, layout::ColumnMajor, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, MathOperatorTag>; // Define iterators over tiles from the A operand using ThreadMapA0 = typename MmaCore0::IteratorThreadMapA; using IteratorA0 = cutlass::conv::threadblock::Conv2dFpropActivationTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, LayoutA, ThreadMapA0 >; using SmemIteratorA0 = typename MmaCore0::SmemIteratorA; // Define iterators over tiles from the B operand using ThreadMapB0 = typename MmaCore0::IteratorThreadMapB; using IteratorB0 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape0::kK, ThreadblockShape0::kN>, ElementB, LayoutB, ThreadMapB0 >; using SmemIteratorB0 = typename MmaCore0::SmemIteratorB; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp0::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 2; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape0::kM, WarpShape0::kN>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Define iterators over tiles from the B operand using ThreadMapB1 = typename MmaCore1::IteratorThreadMapB; using IteratorB1 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, LayoutB, ThreadMapB1 >; using SmemIteratorB1 = typename MmaCore1::SmemIteratorB; // Warp-level GEMM components using WarpMmaTensorOp0 = typename MmaCore0::MmaTensorOp; using WarpMmaTensorOp1 = typename MmaCore1::MmaTensorOp; using MmaPolicy0 = typename MmaCore0::MmaPolicy; using MmaPolicy1 = typename MmaCore1::MmaPolicy; // Use fragment iterator for the accumulator using SmemAccumulatorLayout = cutlass::layout::RowMajor; using FragmentIteratorAccumulator = cutlass::epilogue::warp::FragmentIteratorTensorOp< WarpShape0, InstructionShape, ElementAccumulator, typename WarpMmaTensorOp0::Policy::Operator::FragmentC, SmemAccumulatorLayout >; // Store Accumulator tiles to Shared Memory using SmemIteratorD0 = cutlass::epilogue::warp::TileIteratorTensorOp< WarpShape0, InstructionShape, ElementC, SmemAccumulatorLayout >; static int const kThreadCount = 32; // load warp tile from Shared Memory accumulator using WarpIteratorA1 = cutlass::gemm::warp::MmaTensorOpMultiplicandTileIterator< MatrixShape<WarpShape1::kM, InstructionShape::kK>, cutlass::gemm::Operand::kA, ElementA, SmemAccumulatorLayout, MatrixShape<InstructionShape::kM, InstructionShape::kK>, WarpMmaTensorOp1::Policy::OpDelta::kRow, kThreadCount>; // Define the Mma using B2bMma = threadblock::B2bImplicitGemmMultistageSmemAccumulator< ThreadblockShape0, IteratorA0, SmemIteratorA0, arch::CacheOperation::Always, IteratorB0, SmemIteratorB0, arch::CacheOperation::Global, IteratorAccumulatorScaleBias, FragmentIteratorAccumulator, SmemIteratorD0, ThreadblockShape1, WarpIteratorA1, IteratorB1, SmemIteratorB1, arch::CacheOperation::Global, EpilogueOutputOp0, MmaPolicy0, MmaPolicy1, Stages >; // Define the epilogue using Epilogue = typename epilogue::threadblock::DefaultEpilogueTensorOp< ThreadblockShape1, WarpMmaTensorOp1, 1, EpilogueOutputOp1, EpilogueOutputOp1::kCount >::Epilogue; // Define the kernel using Kernel = cutlass::conv::kernel::B2bImplicitGemmConvolution< B2bMma, Epilogue, ThreadblockSwizzle, conv::Operator::kFprop >; }; ///////////////////////////////////////////////////////////////////////////////////////////////// /// Defines a kernel for Conv2dFprop specialization for Analytic IteratorAlgorithm and multistage /// pipeline with interleaved layout. /// Accumulator will be staged in shared memory. template < typename ElementA, typename ElementB, typename ElementC, typename LayoutC, typename ElementAccumulator, typename ArchTag, typename ThreadblockShape0, typename ThreadblockShape1, typename WarpShape0, typename WarpShape1, typename InstructionShape, typename EpilogueOutputOp0, typename EpilogueOutputOp1, typename ThreadblockSwizzle, int Stages, typename MathOperatorTag, int InterleavedK > struct DefaultB2bConv2dFprop < ElementA, layout::TensorNCxHWx<InterleavedK>, ElementB, layout::TensorCxRSKx<InterleavedK>, ElementC, LayoutC, ElementAccumulator, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, EpilogueOutputOp0, EpilogueOutputOp1, ThreadblockSwizzle, Stages, MathOperatorTag, IteratorAlgorithm::kAnalytic, true > { // Define the core components from GEMM using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, layout::ColumnMajorInterleaved<InterleavedK>, ElementB, layout::RowMajorInterleaved<InterleavedK>, ElementAccumulator, LayoutC, arch::OpClassTensorOp, Stages, MathOperatorTag, true>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, layout::ColumnMajorInterleaved<InterleavedK>, ElementB, layout::RowMajorInterleaved<InterleavedK>, ElementAccumulator, LayoutC, arch::OpClassTensorOp, Stages, MathOperatorTag, true>; // Define iterators over tiles from the A operand // Note GEMM shared memory threadmap is used here because conv global memory // layout needs to be mapped to fprop which is similar to the crosswise // layout which is used by the interleaved GEMM shared memory threadmap. // The Interleaved GEMM global memory layout is similar to the congruous // layout. using ThreadMapA0 = typename MmaCore0::SmemThreadMapA; using IteratorA0 = cutlass::conv::threadblock::Conv2dFpropActivationTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, layout::TensorNCxHWx<InterleavedK>, ThreadMapA0 >; using SmemIteratorA0 = typename MmaCore0::SmemIteratorA; // Define iterators over tiles from the B operand // Note GEMM shared memory threadmap is used here because conv global memory // layout needs to be mapped to fprop which is similar to the crosswise // layout which is used by the interleaved GEMM shared memory threadmap. // The Interleaved GEMM global memory layout is similar to the congruous // layout. using ThreadMapB0 = typename MmaCore0::SmemThreadMapB; using IteratorB0 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape0::kK, ThreadblockShape0::kN>, ElementB, layout::TensorCxRSKx<InterleavedK>, ThreadMapB0 >; using SmemIteratorB0 = typename MmaCore0::SmemIteratorB; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp0::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 4; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape0::kM, WarpShape0::kN>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; using ThreadMapB1 = typename MmaCore1::SmemThreadMapB; using IteratorB1 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorAnalytic< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, layout::TensorCxRSKx<InterleavedK>, ThreadMapB1 >; using SmemIteratorB1 = typename MmaCore1::SmemIteratorB; // Warp-level GEMM components using WarpMmaTensorOp0 = typename MmaCore0::MmaTensorOp; using WarpMmaTensorOp1 = typename MmaCore1::MmaTensorOp; using MmaPolicy0 = typename MmaCore0::MmaPolicy; using MmaPolicy1 = typename MmaCore1::MmaPolicy; // Use fragment iterator for the accumulator using SmemAccumulatorLayout = cutlass::layout::ColumnMajorInterleaved<16>; using FragmentIteratorAccumulator = cutlass::epilogue::warp::FragmentIteratorTensorOp< WarpShape0, InstructionShape, ElementAccumulator, typename WarpMmaTensorOp0::Policy::Operator::FragmentC, SmemAccumulatorLayout >; // Store Accumulator tiles to Shared Memory using SmemIteratorD0 = cutlass::epilogue::warp::TileIteratorTensorOp< WarpShape0, InstructionShape, ElementC, SmemAccumulatorLayout >; static int const kThreadCount = 32; // load warp tile from Shared Memory accumulator using WarpIteratorA1 = cutlass::gemm::warp::MmaTensorOpMultiplicandTileIteratorCanonical< MatrixShape<WarpShape1::kM, InstructionShape::kK>, cutlass::gemm::Operand::kA, ElementA, SmemAccumulatorLayout, MatrixShape<InstructionShape::kM, InstructionShape::kK>, WarpMmaTensorOp1::Policy::OpDelta::kRow, kThreadCount>; // Define the Mma using B2bMma = threadblock::B2bImplicitGemmMultistageSmemAccumulator< ThreadblockShape0, IteratorA0, SmemIteratorA0, arch::CacheOperation::Always, IteratorB0, SmemIteratorB0, arch::CacheOperation::Global, IteratorAccumulatorScaleBias, FragmentIteratorAccumulator, SmemIteratorD0, ThreadblockShape1, WarpIteratorA1, IteratorB1, SmemIteratorB1, arch::CacheOperation::Global, EpilogueOutputOp0, MmaPolicy0, MmaPolicy1, Stages >; // Define the epilogue using Epilogue = typename epilogue::threadblock::DefaultInterleavedConvEpilogue< ThreadblockShape1, WarpMmaTensorOp1, 1, EpilogueOutputOp1, EpilogueOutputOp1::kCount, InterleavedK >::Epilogue; // Define the kernel using Kernel = cutlass::conv::kernel::B2bImplicitGemmConvolution< B2bMma, Epilogue, ThreadblockSwizzle, conv::Operator::kFprop >; }; ///////////////////////////////////////////////////////////////////////////////////////////////// /// Defines a kernel for Conv2dFprop specialization for Optimized IteratorAlgorithm and /// multistage pipeline. /// Accumulator will be staged in shared memory. template < typename ElementA, typename LayoutA, typename ElementB, typename LayoutB, typename ElementC, typename LayoutC, typename ElementAccumulator, typename ArchTag, typename ThreadblockShape0, typename ThreadblockShape1, typename WarpShape0, typename WarpShape1, typename InstructionShape, typename EpilogueOutputOp0, typename EpilogueOutputOp1, typename ThreadblockSwizzle, int Stages, typename MathOperatorTag > struct DefaultB2bConv2dFprop < ElementA, LayoutA, ElementB, LayoutB, ElementC, LayoutC, ElementAccumulator, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, EpilogueOutputOp0, EpilogueOutputOp1, ThreadblockSwizzle, Stages, MathOperatorTag, IteratorAlgorithm::kOptimized, true > { // Define the core components from GEMM using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, layout::RowMajor, ElementB, layout::ColumnMajor, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, MathOperatorTag>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, layout::RowMajor, ElementB, layout::ColumnMajor, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, MathOperatorTag>; // Define iterators over tiles from the A operand using ThreadMapA0 = typename MmaCore0::IteratorThreadMapA; using IteratorA0 = cutlass::conv::threadblock::Conv2dFpropActivationTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, LayoutA, ThreadMapA0 >; using SmemIteratorA0 = typename MmaCore0::SmemIteratorA; // Define iterators over tiles from the B operand using ThreadMapB0 = typename MmaCore0::IteratorThreadMapB; using IteratorB0 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape0::kK, ThreadblockShape0::kN>, ElementB, LayoutB, ThreadMapB0 >; using SmemIteratorB0 = typename MmaCore0::SmemIteratorB; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp0::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 2; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape0::kM, WarpShape0::kN>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Define iterators over tiles from the B operand using ThreadMapB1 = typename MmaCore1::IteratorThreadMapB; using IteratorB1 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, LayoutB, ThreadMapB1 >; using SmemIteratorB1 = typename MmaCore1::SmemIteratorB; // Warp-level GEMM components using WarpMmaTensorOp0 = typename MmaCore0::MmaTensorOp; using WarpMmaTensorOp1 = typename MmaCore1::MmaTensorOp; using MmaPolicy0 = typename MmaCore0::MmaPolicy; using MmaPolicy1 = typename MmaCore1::MmaPolicy; // Use fragment iterator for the accumulator using SmemAccumulatorLayout = cutlass::layout::RowMajor; using FragmentIteratorAccumulator = cutlass::epilogue::warp::FragmentIteratorTensorOp< WarpShape0, InstructionShape, ElementAccumulator, typename WarpMmaTensorOp0::Policy::Operator::FragmentC, SmemAccumulatorLayout >; // Store Accumulator tiles to Shared Memory using SmemIteratorD0 = cutlass::epilogue::warp::TileIteratorTensorOp< WarpShape0, InstructionShape, ElementC, SmemAccumulatorLayout >; static int const kThreadCount = 32; // load warp tile from Shared Memory accumulator using WarpIteratorA1 = cutlass::gemm::warp::MmaTensorOpMultiplicandTileIterator< MatrixShape<WarpShape1::kM, InstructionShape::kK>, cutlass::gemm::Operand::kA, ElementA, SmemAccumulatorLayout, MatrixShape<InstructionShape::kM, InstructionShape::kK>, WarpMmaTensorOp1::Policy::OpDelta::kRow, kThreadCount>; // Define the Mma using B2bMma = threadblock::B2bImplicitGemmMultistageSmemAccumulator< ThreadblockShape0, IteratorA0, SmemIteratorA0, arch::CacheOperation::Always, IteratorB0, SmemIteratorB0, arch::CacheOperation::Global, IteratorAccumulatorScaleBias, FragmentIteratorAccumulator, SmemIteratorD0, ThreadblockShape1, WarpIteratorA1, IteratorB1, SmemIteratorB1, arch::CacheOperation::Global, EpilogueOutputOp0, MmaPolicy0, MmaPolicy1, Stages >; // Define the epilogue using Epilogue = typename epilogue::threadblock::DefaultEpilogueTensorOp< ThreadblockShape1, WarpMmaTensorOp1, 1, EpilogueOutputOp1, EpilogueOutputOp1::kCount >::Epilogue; // Define the kernel using Kernel = cutlass::conv::kernel::B2bImplicitGemmConvolution< B2bMma, Epilogue, ThreadblockSwizzle, conv::Operator::kFprop >; }; ///////////////////////////////////////////////////////////////////////////////////////////////// /// Defines a kernel for Conv2dFprop specialization for Optimzed IteratorAlgorithm and // multistage pipeline with interleaved layout. /// Accumulator will be staged in shared memory. template < typename ElementA, typename ElementB, typename ElementC, typename LayoutC, typename ElementAccumulator, typename ArchTag, typename ThreadblockShape0, typename ThreadblockShape1, typename WarpShape0, typename WarpShape1, typename InstructionShape, typename EpilogueOutputOp0, typename EpilogueOutputOp1, typename ThreadblockSwizzle, int Stages, typename MathOperatorTag, int InterleavedK > struct DefaultB2bConv2dFprop < ElementA, layout::TensorNCxHWx<InterleavedK>, ElementB, layout::TensorCxRSKx<InterleavedK>, ElementC, LayoutC, ElementAccumulator, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, EpilogueOutputOp0, EpilogueOutputOp1, ThreadblockSwizzle, Stages, MathOperatorTag, IteratorAlgorithm::kOptimized, true > { // Define the core components from GEMM using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, layout::ColumnMajorInterleaved<InterleavedK>, ElementB, layout::RowMajorInterleaved<InterleavedK>, ElementAccumulator, LayoutC, arch::OpClassTensorOp, Stages, MathOperatorTag, true>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, layout::ColumnMajorInterleaved<InterleavedK>, ElementB, layout::RowMajorInterleaved<InterleavedK>, ElementAccumulator, LayoutC, arch::OpClassTensorOp, Stages, MathOperatorTag, true>; // Define iterators over tiles from the A operand // Note GEMM shared memory threadmap is used here because conv global memory // layout needs to be mapped to fprop which is similar to the crosswise // layout which is used by the interleaved GEMM shared memory threadmap. // The Interleaved GEMM global memory layout is similar to the congruous // layout. using ThreadMapA0 = typename MmaCore0::SmemThreadMapA; using IteratorA0 = cutlass::conv::threadblock::Conv2dFpropActivationTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, layout::TensorNCxHWx<InterleavedK>, ThreadMapA0 >; using SmemIteratorA0 = typename MmaCore0::SmemIteratorA; // Define iterators over tiles from the B operand // Note GEMM shared memory threadmap is used here because conv global memory // layout needs to be mapped to fprop which is similar to the crosswise // layout which is used by the interleaved GEMM shared memory threadmap. // The Interleaved GEMM global memory layout is similar to the congruous // layout. using ThreadMapB0 = typename MmaCore0::SmemThreadMapB; using IteratorB0 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape0::kK, ThreadblockShape0::kN>, ElementB, layout::TensorCxRSKx<InterleavedK>, ThreadMapB0 >; using SmemIteratorB0 = typename MmaCore0::SmemIteratorB; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp0::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 4; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape0::kM, WarpShape0::kN>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; using ThreadMapB1 = typename MmaCore1::SmemThreadMapB; using IteratorB1 = cutlass::conv::threadblock::Conv2dFpropFilterTileAccessIteratorOptimized< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, layout::TensorCxRSKx<InterleavedK>, ThreadMapB1 >; using SmemIteratorB1 = typename MmaCore1::SmemIteratorB; // Warp-level GEMM components using WarpMmaTensorOp0 = typename MmaCore0::MmaTensorOp; using WarpMmaTensorOp1 = typename MmaCore1::MmaTensorOp; using MmaPolicy0 = typename MmaCore0::MmaPolicy; using MmaPolicy1 = typename MmaCore1::MmaPolicy; // Use fragment iterator for the accumulator using SmemAccumulatorLayout = cutlass::layout::ColumnMajorInterleaved<16>; using FragmentIteratorAccumulator = cutlass::epilogue::warp::FragmentIteratorTensorOp< WarpShape0, InstructionShape, ElementAccumulator, typename WarpMmaTensorOp0::Policy::Operator::FragmentC, SmemAccumulatorLayout >; // Store Accumulator tiles to Shared Memory using SmemIteratorD0 = cutlass::epilogue::warp::TileIteratorTensorOp< WarpShape0, InstructionShape, ElementC, SmemAccumulatorLayout >; static int const kThreadCount = 32; // load warp tile from Shared Memory accumulator using WarpIteratorA1 = cutlass::gemm::warp::MmaTensorOpMultiplicandTileIteratorCanonical< MatrixShape<WarpShape1::kM, InstructionShape::kK>, cutlass::gemm::Operand::kA, ElementA, SmemAccumulatorLayout, MatrixShape<InstructionShape::kM, InstructionShape::kK>, WarpMmaTensorOp1::Policy::OpDelta::kRow, kThreadCount>; // Define the Mma using B2bMma = threadblock::B2bImplicitGemmMultistageSmemAccumulator< ThreadblockShape0, IteratorA0, SmemIteratorA0, arch::CacheOperation::Always, IteratorB0, SmemIteratorB0, arch::CacheOperation::Global, IteratorAccumulatorScaleBias, FragmentIteratorAccumulator, SmemIteratorD0, ThreadblockShape1, WarpIteratorA1, IteratorB1, SmemIteratorB1, arch::CacheOperation::Global, EpilogueOutputOp0, MmaPolicy0, MmaPolicy1, Stages >; // Define the epilogue using Epilogue = typename epilogue::threadblock::DefaultInterleavedConvEpilogue< ThreadblockShape1, WarpMmaTensorOp1, 1, EpilogueOutputOp1, EpilogueOutputOp1::kCount, InterleavedK >::Epilogue; // Define the kernel using Kernel = cutlass::conv::kernel::B2bImplicitGemmConvolution< B2bMma, Epilogue, ThreadblockSwizzle, conv::Operator::kFprop >; }; ///////////////////////////////////////////////////////////////////////////////////////////////// } // namespace kernel } // namespace conv } // namespace cutlass /////////////////////////////////////////////////////////////////////////////////////////////////
examples/13_two_tensor_op_fusion/kernel/default_b2b_conv2d_fprop_smem_accumulator_sm80.h/0
{ "file_path": "examples/13_two_tensor_op_fusion/kernel/default_b2b_conv2d_fprop_smem_accumulator_sm80.h", "repo_id": "examples", "token_count": 9829 }
2
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ /*! \file \brief Template for a pipelined GEMM kernel. Does not compute batching or support split-K. */ #pragma once #include "cutlass/cutlass.h" #include "cutlass/numeric_types.h" #include "cutlass/arch/arch.h" #include "cutlass/transform/threadblock/predicated_tile_iterator.h" #include "cutlass/transform/threadblock/predicated_tile_iterator_2dthreadtile.h" #include "cutlass/transform/threadblock/predicated_vector_access_iterator.h" #include "cutlass/transform/threadblock/vector_iterator.h" #include "cutlass/transform/warp/vector_fragment_iterator.h" #include "cutlass/gemm/threadblock/default_mma_core_sm70.h" #include "cutlass/gemm/threadblock/default_mma_core_sm75.h" #include "cutlass/gemm/threadblock/default_mma_core_sm80.h" #include "cutlass/gemm/warp/mma_tensor_op_fragment_iterator.h" #include "threadblock/b2b_mma_pipelined.h" #include "threadblock/b2b_mma_multistage.h" //////////////////////////////////////////////////////////////////////////////// namespace cutlass { namespace gemm { namespace threadblock { //////////////////////////////////////////////////////////////////////////////// template < /// Element type for A matrix operand typename ElementA_, /// Layout type for A matrix operand typename LayoutA_, /// Access granularity of A matrix in units of elements int kAlignmentA, /// Element type for B matrix operand typename ElementB_, /// Layout type for B matrix operand typename LayoutB_, /// Access granularity of B matrix in units of elements int kAlignmentB, /// Element type for internal accumulation typename ElementAccumulator_, /// Layout type for C and D matrix operands typename LayoutC_, /// Operator class tag typename OperatorClass_, /// Tag indicating architecture to tune for typename ArchTag_, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape0_, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape1_, /// Warp-level tile size (concept: GemmShape) typename WarpShape0_, /// Warp-level tile size (concept: GemmShape) typename WarpShape1_, /// Instruction-level tile size (concept: GemmShape) typename InstructionShape_, /// Number of stages used in the pipelined mainloop int Stages, /// Operation perfomed by GEMM typename Operator, /// Epilogue output operator typename EpilogueOutputOp, /// Store the accumulators in row major or column major. Row major is used /// when output layout is interleaved. bool AccumulatorsInRowMajor = false, /// Staging the accumulators in shared memory. bool SmemAccumulator = false> struct DefaultB2bMma; //////////////////////////////////////////////////////////////////////////////// /// Specialization for row-major output with 2-stage pipeline template < /// Element type for A matrix operand typename ElementA, /// Layout type for A matrix operand typename LayoutA, /// Access granularity of A matrix in units of elements int kAlignmentA, /// Element type for B matrix operand typename ElementB, /// Layout type for B matrix operand typename LayoutB, /// Access granularity of B matrix in units of elements int kAlignmentB, /// Element type for internal accumulation typename ElementAccumulator, /// Tag indicating architecture to tune for typename ArchTag, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape0, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape1, /// Warp-level tile size (concept: GemmShape) typename WarpShape0, /// Warp-level tile size (concept: GemmShape) typename WarpShape1, /// Instruction-level tile size (concept: GemmShape) typename InstructionShape, /// Operation performed by GEMM typename Operator, /// Epilogue output operator typename EpilogueOutputOp> struct DefaultB2bMma<ElementA, LayoutA, kAlignmentA, ElementB, LayoutB, kAlignmentB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, 2, Operator, EpilogueOutputOp, false> { // Define the MmaCore components using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, 2, Operator>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, 2, Operator>; // Define iterators over tiles from the A operand using IteratorA0 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore0::Shape::kM, MmaCore0::Shape::kK>, ElementA, LayoutA, 1, typename MmaCore0::IteratorThreadMapA, kAlignmentA>; // Define iterators over tiles from the B operand using IteratorB0 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore0::Shape::kK, MmaCore0::Shape::kN>, ElementB, LayoutB, 0, typename MmaCore0::IteratorThreadMapB, kAlignmentB>; // Use fragment iterator for A operand using AccumulatorLayout = cutlass::layout::ColumnMajor; using FragmentIteratorA1 = cutlass::gemm::warp::MmaTensorOpFragmentIterator< cutlass::MatrixShape<MmaCore1::WarpShape::kM, MmaCore1::InstructionShape::kK>, //warp shape cutlass::MatrixShape<MmaCore0::WarpShape::kM, MmaCore0::WarpShape::kN>, //accumulator shape MmaCore1::Shape::kK, //kBlocksColumn ElementAccumulator, ElementA, AccumulatorLayout, InstructionShape, EpilogueOutputOp>; using ElementScaleBias = typename EpilogueOutputOp::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 2; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape1::kM, WarpShape1::kK>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Warp-level iterators to load scale and bias vectors using FragmentIteratorA1ScaleBias = cutlass::transform::warp::VectorFragmentIterator< MatrixShape<1, IteratorAccumulatorScaleBias::Fragment::kElements>, ElementScaleBias, LayoutScaleBias, InstructionShape, kElementsPerAccess>; // Define iterators over tiles from the B operand using IteratorB1 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore1::Shape::kK, MmaCore1::Shape::kN>, ElementB, LayoutB, 0, typename MmaCore1::IteratorThreadMapB, kAlignmentB>; // Define the threadblock-scoped pipelined matrix multiply using ThreadblockB2bMma = cutlass::gemm::threadblock::B2bMmaPipelined< typename MmaCore0::Shape, IteratorA0, typename MmaCore0::SmemIteratorA, IteratorB0, typename MmaCore0::SmemIteratorB, typename MmaCore1::Shape, FragmentIteratorA1, IteratorAccumulatorScaleBias, FragmentIteratorA1ScaleBias, IteratorB1, typename MmaCore1::SmemIteratorB, ElementAccumulator, layout::RowMajor, EpilogueOutputOp, typename MmaCore0::MmaPolicy, typename MmaCore1::MmaPolicy>; }; //////////////////////////////////////////////////////////////////////////////// /// Specialization for row-major output for multi-stage template < /// Element type for A matrix operand typename ElementA, /// Layout type for A matrix operand typename LayoutA, /// Access granularity of A matrix in units of elements int kAlignmentA, /// Element type for B matrix operand typename ElementB, /// Layout type for B matrix operand typename LayoutB, /// Access granularity of B matrix in units of elements int kAlignmentB, /// Element type for internal accumulation typename ElementAccumulator, /// Tag indicating architecture to tune for typename ArchTag, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape0, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape1, /// Warp-level tile size (concept: GemmShape) typename WarpShape0, /// Warp-level tile size (concept: GemmShape) typename WarpShape1, /// Instruction-level tile size (concept: GemmShape) typename InstructionShape, /// Number of stages used in the multistage mainloop int Stages, /// Operation performed by GEMM typename Operator, /// Epilogue output operator typename EpilogueOutputOp> struct DefaultB2bMma<ElementA, LayoutA, kAlignmentA, ElementB, LayoutB, kAlignmentB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, Stages, Operator, EpilogueOutputOp, false> { static cutlass::arch::CacheOperation::Kind const CacheOpA = ((sizeof_bits<ElementA>::value * kAlignmentA) == 128) ? cutlass::arch::CacheOperation::Global : cutlass::arch::CacheOperation::Always; static cutlass::arch::CacheOperation::Kind const CacheOpB = ((sizeof_bits<ElementB>::value * kAlignmentB) == 128) ? cutlass::arch::CacheOperation::Global : cutlass::arch::CacheOperation::Always; // Define the MmaCore components using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, Operator, false, CacheOpA, CacheOpB>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::RowMajor, arch::OpClassTensorOp, Stages, Operator, false, CacheOpA, CacheOpB>; // Define iterators over tiles from the A operand using ThreadMapA0 = typename MmaCore0::IteratorThreadMapA; using AccessTypeA0 = cutlass::Array<ElementA, kAlignmentA>; using IteratorA0 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, LayoutA, 1, ThreadMapA0, AccessTypeA0>; // Define iterators over tiles from the B operand using ThreadMapB0 = typename MmaCore0::IteratorThreadMapB; using AccessTypeB0 = cutlass::Array<ElementB, kAlignmentB>; using IteratorB0 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kK, ThreadblockShape0::kN>, ElementB, LayoutB, 0, ThreadMapB0, AccessTypeB0>; // Use fragment iterator for A operand using AccumulatorLayout = cutlass::layout::ColumnMajor; using FragmentIteratorA1 = cutlass::gemm::warp::MmaTensorOpFragmentIterator< cutlass::MatrixShape<MmaCore1::WarpShape::kM, MmaCore1::InstructionShape::kK>, //warp shape cutlass::MatrixShape<MmaCore0::WarpShape::kM, MmaCore0::WarpShape::kN>, //accumulator shape MmaCore1::Shape::kK, //kBlocksColumn ElementAccumulator, ElementA, AccumulatorLayout, InstructionShape, EpilogueOutputOp>; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 2; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape1::kM, WarpShape1::kK>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Warp-level iterators to load scale and bias vectors using FragmentIteratorA1ScaleBias = cutlass::transform::warp::VectorFragmentIterator< MatrixShape<1, IteratorAccumulatorScaleBias::Fragment::kElements>, ElementScaleBias, LayoutScaleBias, InstructionShape, kElementsPerAccess>; // Define iterators over tiles from the B operand using ThreadMapB1 = typename MmaCore1::IteratorThreadMapB; using AccessTypeB1 = cutlass::Array<ElementB, kAlignmentB>; using IteratorB1 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, LayoutB, 0, ThreadMapB1, AccessTypeB1>; // Define the threadblock-scoped pipelined matrix multiply using ThreadblockB2bMma = cutlass::gemm::threadblock::B2bMmaMultistage< typename MmaCore0::Shape, IteratorA0, typename MmaCore0::SmemIteratorA, MmaCore0::kCacheOpA, IteratorB0, typename MmaCore0::SmemIteratorB, MmaCore0::kCacheOpB, typename MmaCore1::Shape, FragmentIteratorA1, IteratorAccumulatorScaleBias, FragmentIteratorA1ScaleBias, IteratorB1, typename MmaCore1::SmemIteratorB, MmaCore1::kCacheOpB, ElementAccumulator, layout::RowMajor, EpilogueOutputOp, typename MmaCore0::MmaPolicy, typename MmaCore1::MmaPolicy, Stages>; }; //////////////////////////////////////////////////////////////////////////////// /// Specialization for column-major-interleaved output with 2-stage pipeline template < /// Element type for A matrix operand typename ElementA, /// Layout type for A matrix operand typename LayoutA, /// Access granularity of A matrix in units of elements int kAlignmentA, /// Element type for B matrix operand typename ElementB, /// Layout type for B matrix operand typename LayoutB, /// Access granularity of B matrix in units of elements int kAlignmentB, /// Element type for internal accumulation typename ElementAccumulator, /// Tag indicating architecture to tune for typename OperatorClass, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape0, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape1, /// Warp-level tile size (concept: GemmShape) typename WarpShape0, /// Warp-level tile size (concept: GemmShape) typename WarpShape1, /// Instruction-level tile size (concept: GemmShape) typename InstructionShape, /// Operation performed by GEMM typename Operator, /// Epilogue output operator typename EpilogueOutputOp, /// Number of Interleaved K int InterleavedK> struct DefaultB2bMma<ElementA, LayoutA, kAlignmentA, ElementB, LayoutB, kAlignmentB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, arch::Sm75, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, 2, Operator, EpilogueOutputOp, true> { // Define the MmaCore components using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, 2, Operator, true>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, 2, Operator, true>; static_assert(kAlignmentA == 128 / sizeof_bits<ElementA>::value, "Alignment must match thread data map's vector length"); static_assert(kAlignmentB ==128 / sizeof_bits<ElementB>::value, "Alignment must match thread data map's vector length"); // Define iterators over tiles from the A operand using IteratorA0 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore0::Shape::kM, MmaCore0::Shape::kK>, ElementA, LayoutA, 1, typename MmaCore0::IteratorThreadMapA>; // Define iterators over tiles from the B operand using IteratorB0 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore0::Shape::kK, MmaCore0::Shape::kN>, ElementB, LayoutB, 0, typename MmaCore0::IteratorThreadMapB>; // Use fragment iterator for A1 operand using AccumulatorLayout = cutlass::layout::RowMajor; //AccumulatorsInRowMajor = true using FragmentIteratorA1 = cutlass::gemm::warp::MmaTensorOpFragmentIterator< cutlass::MatrixShape<MmaCore1::WarpShape::kM, MmaCore1::InstructionShape::kK>, //warp shape cutlass::MatrixShape<MmaCore0::WarpShape::kM, MmaCore0::WarpShape::kN>, //accumulator shape MmaCore1::Shape::kK, //kBlocksColumn ElementAccumulator, ElementA, AccumulatorLayout, InstructionShape, EpilogueOutputOp>; using ElementScaleBias = typename EpilogueOutputOp::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 4; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape1::kM, WarpShape1::kK>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Warp-level iterators to load scale and bias vectors using FragmentIteratorA1ScaleBias = cutlass::transform::warp::VectorFragmentIterator< MatrixShape<1, IteratorAccumulatorScaleBias::Fragment::kElements>, ElementScaleBias, LayoutScaleBias, InstructionShape, kElementsPerAccess>; // Define iterators over tiles from the B operand using IteratorB1 = cutlass::transform::threadblock::PredicatedTileIterator< cutlass::MatrixShape<MmaCore1::Shape::kK, MmaCore1::Shape::kN>, ElementB, LayoutB, 0, typename MmaCore1::IteratorThreadMapB>; // Define the threadblock-scoped pipelined matrix multiply using ThreadblockB2bMma = cutlass::gemm::threadblock::B2bMmaPipelined< typename MmaCore0::Shape, IteratorA0, typename MmaCore0::SmemIteratorA, IteratorB0, typename MmaCore0::SmemIteratorB, typename MmaCore1::Shape, FragmentIteratorA1, IteratorAccumulatorScaleBias, FragmentIteratorA1ScaleBias, IteratorB1, typename MmaCore1::SmemIteratorB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, EpilogueOutputOp, typename MmaCore0::MmaPolicy, typename MmaCore1::MmaPolicy>; }; //////////////////////////////////////////////////////////////////////////////// /// Specialization for column-major-interleaved output with multi-stage template < /// Element type for A matrix operand typename ElementA, /// Layout type for A matrix operand typename LayoutA, /// Access granularity of A matrix in units of elements int kAlignmentA, /// Element type for B matrix operand typename ElementB, /// Layout type for B matrix operand typename LayoutB, /// Access granularity of B matrix in units of elements int kAlignmentB, /// Element type for internal accumulation typename ElementAccumulator, /// Tag indicating architecture to tune for typename OperatorClass, /// Tag indicating architecture to tune for typename ArchTag, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape0, /// Threadblock-level tile size (concept: GemmShape) typename ThreadblockShape1, /// Warp-level tile size (concept: GemmShape) typename WarpShape0, /// Warp-level tile size (concept: GemmShape) typename WarpShape1, /// Instruction-level tile size (concept: GemmShape) typename InstructionShape, /// Number of stages used in the multistage mainloop int Stages, /// Operation performed by GEMM typename Operator, /// Epilogue output operator typename EpilogueOutputOp, /// Number of Interleaved K int InterleavedK> struct DefaultB2bMma<ElementA, LayoutA, kAlignmentA, ElementB, LayoutB, kAlignmentB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, ArchTag, ThreadblockShape0, ThreadblockShape1, WarpShape0, WarpShape1, InstructionShape, Stages, Operator, EpilogueOutputOp, true> { // Define the MmaCore components using MmaCore0 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape0, WarpShape0, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, Stages, Operator, true>; using MmaCore1 = typename cutlass::gemm::threadblock::DefaultMmaCore< ThreadblockShape1, WarpShape1, InstructionShape, ElementA, LayoutA, ElementB, LayoutB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, OperatorClass, Stages, Operator, true>; // Define iterators over tiles from the A operand using ThreadMapA0 = typename MmaCore0::IteratorThreadMapA; using AccessTypeA = cutlass::Array<ElementA, kAlignmentA>; using IteratorA0 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kK>, ElementA, LayoutA, 1, ThreadMapA0, AccessTypeA>; // Define iterators over tiles from the B operand using ThreadMapB0 = typename MmaCore0::IteratorThreadMapB; using AccessTypeB = cutlass::Array<ElementB, kAlignmentB>; using IteratorB0 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, LayoutB, 0, ThreadMapB0, AccessTypeB>; // Use fragment iterator for A1 operand using AccumulatorLayout = cutlass::layout::RowMajor; //AccumulatorsInRowMajor = true using FragmentIteratorA1 = cutlass::gemm::warp::MmaTensorOpFragmentIterator< cutlass::MatrixShape<MmaCore1::WarpShape::kM, MmaCore1::InstructionShape::kK>, //warp shape cutlass::MatrixShape<MmaCore0::WarpShape::kM, MmaCore0::WarpShape::kN>, //accumulator shape MmaCore1::Shape::kK, //kBlocksColumn ElementAccumulator, ElementA, AccumulatorLayout, InstructionShape, EpilogueOutputOp>; /// Define iterators over tiles from scale/bias vectors using ElementScaleBias = typename EpilogueOutputOp::ElementCompute; using LayoutScaleBias = layout::RowMajor; //vector layout doesn't really matter static int const kElementsPerAccess = 4; using IteratorAccumulatorScaleBias = cutlass::transform::threadblock::VectorIterator< cutlass::transform::threadblock::PredicatedVectorAccessIterator< cutlass::MatrixShape<ThreadblockShape0::kM, ThreadblockShape0::kN>, cutlass::MatrixShape<WarpShape1::kM, WarpShape1::kK>, ElementScaleBias, LayoutScaleBias, kElementsPerAccess> >; // Warp-level iterators to load scale and bias vectors using FragmentIteratorA1ScaleBias = cutlass::transform::warp::VectorFragmentIterator< MatrixShape<1, IteratorAccumulatorScaleBias::Fragment::kElements>, ElementScaleBias, LayoutScaleBias, InstructionShape, kElementsPerAccess>; // Define iterators over tiles from the B operand using ThreadMapB1 = typename MmaCore1::IteratorThreadMapB; using IteratorB1 = cutlass::transform::threadblock::PredicatedTileAccessIterator< cutlass::MatrixShape<ThreadblockShape1::kK, ThreadblockShape1::kN>, ElementB, LayoutB, 0, ThreadMapB1, AccessTypeB>; // Define the threadblock-scoped multistage matrix multiply using ThreadblockB2bMma = cutlass::gemm::threadblock::B2bMmaMultistage< typename MmaCore0::Shape, IteratorA0, typename MmaCore0::SmemIteratorA, MmaCore0::kCacheOpA, IteratorB0, typename MmaCore0::SmemIteratorB, MmaCore0::kCacheOpB, typename MmaCore1::Shape, FragmentIteratorA1, IteratorAccumulatorScaleBias, FragmentIteratorA1ScaleBias, IteratorB1, typename MmaCore1::SmemIteratorB, MmaCore1::kCacheOpB, ElementAccumulator, layout::ColumnMajorInterleaved<InterleavedK>, EpilogueOutputOp, typename MmaCore0::MmaPolicy, typename MmaCore1::MmaPolicy, Stages>; }; //////////////////////////////////////////////////////////////////////////////// } // namespace threadblock } // namespace gemm } // namespace cutlass ////////////////////////////////////////////////////////////////////////////////
examples/13_two_tensor_op_fusion/threadblock/default_b2b_mma.h/0
{ "file_path": "examples/13_two_tensor_op_fusion/threadblock/default_b2b_mma.h", "repo_id": "examples", "token_count": 9284 }
3
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ /* This example requires NVIDIA Ampere GPU or later. */ // Standard Library includes #include <iostream> #include <sstream> #include <vector> // CUTLASS Includes #include "cutlass/cutlass.h" #include "cutlass/functional.h" #include "cutlass/layout/matrix.h" #include "cutlass/gemm/warp/default_mma_tensor_op.h" #include "cutlass/epilogue/warp/fragment_iterator_tensor_op.h" #include "cutlass/epilogue/warp/tile_iterator_tensor_op.h" // CUTLASS Utility Includes #include "cutlass/util/host_tensor.h" #include "cutlass/util/tensor_view_io.h" #include "cutlass/util/reference/host/tensor_compare.h" #include "cutlass/util/reference/host/tensor_fill.h" #include "cutlass/util/reference/host/gemm_complex.h" /////////////////////////////////////////////////////////////////////////////////////////////////// // Define the overal warp-level problem shape int const kM = 27; int const kN = 31; int const kK = 17; /////////////////////////////////////////////////////////////////////////////////////////////////// // Define a warp-level GEMM operator. // // This template could be part of the CUTLASS Template Library or implemented internally. This // wraps the matrix multiply operation and epilogue with a GEMM-like interface that can be // instantiated in device code. namespace cutlass { namespace gemm { namespace warp { template < typename Shape, typename InstructionShape, typename ElementA, typename LayoutA, typename ElementB, typename LayoutB, typename ElementC, typename LayoutC, typename ElementScalar > class GemmTensorOp { public: using WarpShape = GemmShape< ((Shape::kM + InstructionShape::kM - 1) / InstructionShape::kM) * InstructionShape::kM, ((Shape::kN + InstructionShape::kN - 1) / InstructionShape::kN) * InstructionShape::kN, InstructionShape::kK >; using MmaWarp = typename cutlass::gemm::warp::DefaultMmaTensorOp< WarpShape, InstructionShape, double, // Data type of A elements cutlass::layout::RowMajor, // Layout of A matrix double, // Data type of B elements cutlass::layout::ColumnMajor, // Layout of B matrix double, // Data type of C elements cutlass::layout::RowMajor // Layout of C matrix >::Type; // Number of 'K groups' int const kKgroups = (Shape::kK + InstructionShape::kK - 1) / InstructionShape::kK; // Define a 'FragmentIterator' to iterate over slices of accumulators using FragmentIterator = cutlass::epilogue::warp::FragmentIteratorTensorOp< typename MmaWarp::Shape, InstructionShape, double, typename MmaWarp::Policy::Operator::FragmentC, cutlass::layout::RowMajor >; // Define an epilogue 'Tile Iteterator' to iterate over slices of elements in Shared Memory using AccumulatorTileIterator = cutlass::epilogue::warp::TileIteratorTensorOpCanonical< typename MmaWarp::Shape, InstructionShape, double, cutlass::layout::RowMajor >; using TensorRefA = typename MmaWarp::IteratorA::TensorRef; using TensorRefB = typename MmaWarp::IteratorB::TensorRef; using TensorRefC = typename AccumulatorTileIterator::TensorRef; public: CUTLASS_HOST_DEVICE GemmTensorOp() { } CUTLASS_DEVICE void operator()( ElementScalar alpha, TensorRefA ref_A, TensorRefB ref_B, ElementScalar beta, TensorRefC ref_C, TensorRefC ref_D, int lane_id) const { // Instantiate iterators pointing to slices of the A and B matrices in shared memory typename MmaWarp::IteratorA iter_A(ref_A, {Shape::kM, Shape::kK}, lane_id); typename MmaWarp::IteratorB iter_B(ref_B, {Shape::kK, Shape::kN}, lane_id); // Instantiate and clear accumulator tile holding the C matrix typename MmaWarp::FragmentC accum; accum.clear(); // Instantiate the warp-level matrix multiply operator MmaWarp mma_op; // Instantiate fragments holding the slice of the matrix held by each warp typename MmaWarp::FragmentA frag_A[2]; typename MmaWarp::FragmentB frag_B[2]; // Load fragments from shared memory iter_A.load(frag_A[0]); iter_B.load(frag_B[0]); ++iter_A; ++iter_B; // Load fragments from shared memory CUTLASS_PRAGMA_UNROLL for (int k = 0; k < kKgroups; ++k) { // Load fragments from shared memory iter_A.load(frag_A[(k + 1) % 2]); iter_B.load(frag_B[(k + 1) % 2]); ++iter_A; ++iter_B; // Compute the matrix multiply mma_op(accum, frag_A[k % 2], frag_B[k % 2], accum); } // Instantiate iterators FragmentIterator accum_frag_it(accum); AccumulatorTileIterator source_tile_it(ref_C, {Shape::kM, Shape::kN}, lane_id); AccumulatorTileIterator dest_tile_it(ref_D, {Shape::kM, Shape::kN}, lane_id); // Define function objects for linear scaling operation cutlass::multiplies<typename FragmentIterator::Fragment> mul_source; cutlass::multiply_add<typename FragmentIterator::Fragment> mul_add_accumulator; // Iterate over the epilogue components CUTLASS_PRAGMA_UNROLL for (int idx = 0; idx < FragmentIterator::kIterations; ++idx) { // Define storage for slices of the accumulators typename FragmentIterator::Fragment accum_fragment; typename FragmentIterator::Fragment source_fragment; // Select a slice of accumulators from the accumulator tile accum_frag_it.load(accum_fragment); ++accum_frag_it; // Load a corresponding slice from Shared memory source_tile_it.load(source_fragment); ++source_tile_it; // Compute linear scaling - alpha * AB + beta * C source_fragment = mul_source(beta, source_fragment); accum_fragment = mul_add_accumulator(alpha, accum_fragment, source_fragment); // Store the result to shared memory dest_tile_it.store(accum_fragment); ++dest_tile_it; } } }; } // namespace warp } // namespace gemm } // namespace cutlass /////////////////////////////////////////////////////////////////////////////////////////////////// // Sample kernel demonstrating a collective GEMM operation by a warp on arbitrary matrices held // in Shared Memory. __global__ void kernel( double *D_gmem, double alpha, double const *A_gmem, double const *B_gmem, double beta, double const *C_gmem) { // Define several matrices in shared memory __shared__ double A[kM][kK]; __shared__ double B[kN][kK]; __shared__ double C[kM][kN]; // Copy data into SMEM if (threadIdx.x == 0) { CUTLASS_PRAGMA_NO_UNROLL for (int m = 0; m < kM; ++m) { for (int k = 0; k < kK; ++k) { A[m][k] = A_gmem[m * kK + k]; } } CUTLASS_PRAGMA_NO_UNROLL for (int n = 0; n < kN; ++n) { for (int k = 0; k < kK; ++k) { B[n][k] = B_gmem[n * kK + k]; } } CUTLASS_PRAGMA_NO_UNROLL for (int m = 0; m < kM; ++m) { CUTLASS_PRAGMA_NO_UNROLL for (int n = 0; n < kN; ++n) { C[m][n] = C_gmem[m * kN + n]; } } } __syncthreads(); // // Instantiate a warp-level matrix multiply operator given the fundamental instruction shape (8x8x4), // overall shape, data type of each operand, and layout of each operand. // using GemmTensorOp = cutlass::gemm::warp::GemmTensorOp< cutlass::gemm::GemmShape<kM, kN, kK>, cutlass::gemm::GemmShape<8, 8, 4>, double, // Data type of A elements cutlass::layout::RowMajor, // Layout of A matrix double, // Data type of B elements cutlass::layout::ColumnMajor, // Layout of B matrix double, // Data type of C elements cutlass::layout::RowMajor, // Layout of C matrix double // Scalar type of alpha and beta >; // Instantiate the GEMM operator GemmTensorOp gemm; // Execute the warp-level GEMM operation gemm( alpha, {&A[0][0], kK}, {&B[0][0], kK}, beta, {&C[0][0], kN}, {&C[0][0], kN}, threadIdx.x); __syncthreads(); // Copy data into SMEM if (threadIdx.x == 0) { CUTLASS_PRAGMA_NO_UNROLL for (int m = 0; m < kM; ++m) { CUTLASS_PRAGMA_NO_UNROLL for (int n = 0; n < kN; ++n) { D_gmem[m * kN + n] = C[m][n]; } } } } /////////////////////////////////////////////////////////////////////////////////////////////////// /// Entry point to canonical warp-level GEMM operation int main(int argc, const char *arg[]) { bool notSupported = false; // CUTLASS must be compiled with CUDA 11 Toolkit to run these examples. if (!(__CUDACC_VER_MAJOR__ >= 11)) { std::cerr << "NVIDIA Ampere Tensor Core operations must be compiled with CUDA 11.0 Toolkit or later." << std::endl; notSupported = true; } cudaDeviceProp props; cudaError_t error = cudaGetDeviceProperties(&props, 0); if (error != cudaSuccess) { std::cerr << "cudaGetDeviceProperties() returned an error: " << cudaGetErrorString(error) << std::endl; return -1; } if (!((props.major * 10 + props.minor) >= 80)) { std::cerr << "This example requires compute capability at least 80." << std::endl; notSupported = true; } if (notSupported) { // Return 0 so tests are considered passing if run on unsupported platforms. return 0; } cutlass::HostTensor<double, cutlass::layout::RowMajor> A({kM, kK}); cutlass::HostTensor<double, cutlass::layout::ColumnMajor> B({kK, kN}); cutlass::HostTensor<double, cutlass::layout::RowMajor> C({kM, kN}); cutlass::HostTensor<double, cutlass::layout::RowMajor> D({kM, kN}); uint64_t seed = 2020; double max = 8; double min = -8; cutlass::reference::host::TensorFillRandomUniform( A.host_view(), seed, max, min, 0 ); cutlass::reference::host::TensorFillRandomUniform( B.host_view(), seed + 17, max, min, 0 ); cutlass::reference::host::TensorFillRandomUniform( C.host_view(), seed + 31, max, min, 0 ); A.sync_device(); B.sync_device(); C.sync_device(); D.sync_device(); dim3 grid(1,1); dim3 block(32, 1, 1); double alpha = 2.25; double beta = 1.24; kernel<<< grid, block >>>( D.device_data(), alpha, A.device_data(), B.device_data(), beta, C.device_data() ); cudaError_t result = cudaDeviceSynchronize(); if (result != cudaSuccess) { std::cerr << "Failed to synchronize device after kernel launch." << std::endl; return -1; } D.sync_host(); // Compute reference on host cutlass::HostTensor<double, cutlass::layout::RowMajor> D_ref({kM, kN}, false); cutlass::reference::host::GemmComplex( {kM, kN, kK}, alpha, A.host_ref(), cutlass::ComplexTransform::kNone, B.host_ref(), cutlass::ComplexTransform::kNone, beta, C.host_ref(), D_ref.host_ref(), double() ); // Verify reference matches computed if (!cutlass::reference::host::TensorEquals( D.host_view(), D_ref.host_view())) { std::cerr << "A =\n" << A.host_view() << "\n\nB = \n" << B.host_view() << "\n\nC = " << C.host_view() << "\n\nRef =\n" << D_ref.host_view() << "\n\nD =\n" << D.host_view() << "\n\n"; std::cerr << "Error - device results mismatch host reference." << std::endl; return -1; } std::cout << "Passed" << std::endl; return 0; } ///////////////////////////////////////////////////////////////////////////////////////////////////
examples/19_tensorop_canonical/tensorop_canonical.cu/0
{ "file_path": "examples/19_tensorop_canonical/tensorop_canonical.cu", "repo_id": "examples", "token_count": 5070 }
4
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ /** NVIDIA Ampere architecture starts supporting tfloat32 (see include/cutlass/tfloat32.h) data types in tensor cores. One big advantage is that we can load in fp32 data and convert them implicitly to tf32 inside the GEMM kernel which means no change is needed to accelerate traditional fp32 data by using NVIDIA Ampere architecture. We can use the tf32 mode of tensor core to emulate a fast accurate SGEMM kernel which is accelerated using Ampere Tensor Cores (see include/cutlass/gemm/warp/mma_tensor_op_fast_f32.h). The trick is very simple a x b = (a_big + a_small) x (b_big + b_small) = a_big x b_big + a_big x b_small + a_small x b_big big = convert_to_tf32(fp32) small = convert_to_tf32(fp32 - big) a_small x b_small is discarded because they are too small. This example demonstrates usage of this kernel, along with accuracy measurements w.r.t. actual FP32 results (SGEMM using SIMT) and against FP64 results (DGEMM) To enable this feature, the only change needs to make is to change the default OpMultiplyAdd to OpMultiplyAddFastF32. Now, we have several different flavors of sgemm now in the profiler for Ampere. Here are the difference sgemm // CUDA core SIMT kernel. FP32 in, accumulated in FP32, FP32 out. s1688gemm // Use 3xTF32 to emulate FP32. FP32 in, converted in TF32-big and TF32-small internally, // accumulated in FP32, FP32 out. s1688tf32gemm // Use 1xTF32. FP32 in, converted to one TF32 internally, accumulated in FP32, FP32 out. s1688gemm_tf32 // TF32 in, accumulated in FP32, FP32 out. */ #include <iostream> #include <vector> #include <limits> #include "cutlass/cutlass.h" #include "cutlass/gemm/device/gemm.h" #include "cutlass/util/command_line.h" #include "cutlass/util/host_tensor.h" #include "cutlass/util/reference/device/gemm.h" #include "cutlass/util/reference/host/tensor_reduce.h" #include "cutlass/util/reference/host/tensor_compare.h" #include "cutlass/util/reference/host/tensor_norm.h" #include "cutlass/util/reference/host/tensor_copy.h" #include "cutlass/util/reference/host/tensor_fill.h" #include "cutlass/util/reference/host/error_metrics.h" #include "cutlass/util/tensor_view_io.h" #include "helper.h" ///////////////////////////////////////////////////////////////////////////////////////////////// /// Result structure struct Result { double runtime_ms; double gflops; cutlass::Status status; cudaError_t error; int m, n, k; double l2_norm_3xtf32_vs_fp64; double l2_norm_1xtf32_vs_fp64; double l2_norm_fp32_vs_fp64; // ctor Result( int m, int n, int k, double runtime_ms, double gflops, double l2_norm_3xtf32_vs_fp64, double l2_norm_1xtf32_vs_fp64, double l2_norm_fp32_vs_fp64) : m(m), n(n), k(k), runtime_ms(runtime_ms), gflops(gflops), l2_norm_3xtf32_vs_fp64(l2_norm_3xtf32_vs_fp64), l2_norm_1xtf32_vs_fp64(l2_norm_1xtf32_vs_fp64), l2_norm_fp32_vs_fp64(l2_norm_fp32_vs_fp64) {} Result() {} // // Methods // static void print_csv_header() { std::cout << "M,N,K,Runtime(ms),GFLOPS,3xTF32_vs_FP64,1xTF32_vs_FP64,FP32_vs_FP64" << std::endl; } void print_csv_row() { std::cout << m << "," << n << "," << k << "," << runtime_ms << "," << gflops << "," << l2_norm_3xtf32_vs_fp64 << "," << l2_norm_1xtf32_vs_fp64 << "," << l2_norm_fp32_vs_fp64 << std::endl; } }; std::vector<Result> results; /////////////////////////////////////////////////////////////////////////////////////////////////// // Command line options parsing struct Options { bool help; cutlass::gemm::GemmCoord problem_size; float alpha; float beta; std::string rand_mode; int iterations; int seed; bool benchmark; Options(): help(false), problem_size({3456, 4096, 4096}), iterations(20), seed(1), alpha(1), beta(), rand_mode("uniform"), benchmark(false) { } bool valid() { // // CUTLASS attempts to load 128b vectors of F32 elements. Consequently, // all pointers, strides, and tensor extents must be divisible by 4 elements. // int const kAlignment = 4; if ((problem_size.m() % kAlignment) || (problem_size.n() % kAlignment) || (problem_size.k() % kAlignment)) { // misaligned tensors return false; } return true; } // Parses the command line void parse(int argc, char const **args) { cutlass::CommandLine cmd(argc, args); if (cmd.check_cmd_line_flag("help")) { help = true; } cmd.get_cmd_line_argument("m", problem_size.m()); cmd.get_cmd_line_argument("n", problem_size.n()); cmd.get_cmd_line_argument("k", problem_size.k()); cmd.get_cmd_line_argument("alpha", alpha); cmd.get_cmd_line_argument("beta", beta); cmd.get_cmd_line_argument("iterations", iterations); cmd.get_cmd_line_argument("seed", seed); cmd.get_cmd_line_argument("rand_mode", rand_mode); if (cmd.check_cmd_line_flag("benchmark")) { benchmark = true; } } /// Prints the usage statement. std::ostream & print_usage(std::ostream &out) const { out << "27_ampere_3xtf32_fast_accurate_tensorop_gemm example\n\n" << " This example uses the CUTLASS Library to emulate FP32 with TF32 tensorop GEMM computations.\n\n" << "Options:\n\n" << " --help If specified, displays this usage statement.\n\n" << " --m=<int> GEMM M dimension\n" << " --n=<int> GEMM N dimension\n" << " --k=<int> GEMM K dimension\n" << " --alpha=<f32> Epilogue scalar alpha\n" << " --beta=<f32> Epilogue scalar beta\n\n" << " --rand_mode=<string> gauss / uniform*\n\n" << " --seed=<int> Random number seed (1*)\n\n" << " --iterations=<int> Number of profiling iterations to perform.\n\n" << " --benchmark If set (true), performance benchmarking on several layers and batch-size.\n\n"; out << "\n\nExamples:\n\n" << "$ ./examples/27_ampere_3xtf32_fast_accurate_tensorop_gemm/27_ampere_3xtf32_fast_accurate_tensorop_gemm --m=1024 --n=512 \\\n" << " --alpha=2 --beta=0.707 \n\n"; return out; } /// Compute performance in GFLOP/s double gflops(double runtime_s) const { // Number of real-valued multiply-adds int64_t fmas = problem_size.product(); // Two flops per multiply-add return 2.0 * double(fmas) / double(1.0e9) / runtime_s; } }; /////////////////////////////////////////////////////////////////////////////////////////////////// // The code section below describes matrix layout of input and output matrices. Column Major for // Matrix A, Row Major for Matrix B and Row Major for Matrix C using LayoutInputA = cutlass::layout::RowMajor; using LayoutInputB = cutlass::layout::ColumnMajor; using LayoutOutput = cutlass::layout::RowMajor; // This code section describes whether you want to use tensor cores or regular SIMT cores on GPU SM using MMAOp = cutlass::arch::OpClassTensorOp; // This code section describes CUDA SM architecture number using SmArch = cutlass::arch::Sm80; // This code section describes the tile size a thread block will compute using ShapeMMAThreadBlock = cutlass::gemm::GemmShape<128, 64, 16>; // <- threadblock tile M = 128, N = 128, K = 16 // This code section describes tile size a warp will compute using ShapeMMAWarp = cutlass::gemm::GemmShape<64, 32, 16>; // <- warp tile M = 64, N = 64, K = 16 // This code section describes the size of MMA op using ShapeMMAOp = cutlass::gemm::GemmShape<16, 8, 8>; // <- MMA Op tile M = 16, N = 8, K = 8 // This code section describes how threadblocks are scheduled on GPU using SwizzleThreadBlock = cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle<>; // This code section describes the epilogue part of the kernel using EpilogueOp = cutlass::epilogue::thread::LinearCombination< float, // <- data type of output matrix 128 / cutlass::sizeof_bits<float>::value, // <- the number of elements per vectorized // memory access. For a byte, it's 16 // elements. This becomes the vector width of // math instructions in the epilogue too float, // <- data type of accumulator float>; // <- data type for alpha/beta in linear combination function // Number of pipelines you want to use constexpr int NumStages = 3; // Alignment constexpr int Alignment = 4; // // Gemm Operators (Gemm_3xTF32, Gemm_1xTF32, GEMM_F32, GEMM_F64) // // Gemm_3xTF32 using Gemm_3xTF32 = cutlass::gemm::device::Gemm< float, LayoutInputA, float, LayoutInputB, float, LayoutOutput, float, MMAOp, SmArch, ShapeMMAThreadBlock, ShapeMMAWarp, ShapeMMAOp, EpilogueOp, SwizzleThreadBlock, NumStages, Alignment, Alignment, false, cutlass::arch::OpMultiplyAddFastF32>; // Gemm_1xTF32 using Gemm_1xTF32 = cutlass::gemm::device::Gemm< float, LayoutInputA, float, LayoutInputB, float, LayoutOutput, float, MMAOp, SmArch, ShapeMMAThreadBlock, ShapeMMAWarp, ShapeMMAOp, EpilogueOp, SwizzleThreadBlock, NumStages, Alignment, Alignment, false, cutlass::arch::OpMultiplyAdd>; // Gemm_F64 using Gemm_F64 = cutlass::reference::device::Gemm< double, LayoutInputA, double, LayoutInputB, double, LayoutOutput, double, double>; // Gemm_F32 using Gemm_F32 = cutlass::reference::device::Gemm< float, LayoutInputA, float, LayoutInputB, float, LayoutOutput, float, float>; bool run(Options &options) { // Create a tuple of problem size for matrix multiplication cutlass::gemm::GemmCoord problem_size = options.problem_size; //////////////////////////////////////////////////////////////////////////////// /// 1. Initialize F32 Precision input tensors using CUTLASS helper functions //////////////////////////////////////////////////////////////////////////////// cutlass::HostTensor<float, LayoutInputA> tensor_a_F32(problem_size.mk()); // <- Create matrix A with dimensions M x K cutlass::HostTensor<float, LayoutInputB> tensor_b_F32(problem_size.kn()); // <- Create matrix B with dimensions K x N cutlass::HostTensor<float, LayoutOutput> tensor_c_F32(problem_size.mn()); // <- Create matrix C with dimensions M x N cutlass::HostTensor<float, LayoutOutput> tensor_d_F32(problem_size.mn()); // <- Create matrix D with dimensions M x N if (options.rand_mode == "uniform") { const float min = -1; const float max = 1; // Fill input and output matrices on host using CUTLASS helper functions cutlass::reference::host::TensorFillRandomUniform( tensor_a_F32.host_view(), options.seed, double(max), double(min)); // <- Fill matrix A on host with uniform-distribution random data cutlass::reference::host::TensorFillRandomUniform( tensor_b_F32.host_view(), options.seed, double(max), double(min)); // <- Fill matrix B on host with uniform-distribution random data cutlass::reference::host::TensorFillRandomUniform( tensor_c_F32.host_view(), options.seed, double(max), double(min)); // <- Fill matrix C on host with uniform-distribution random data } else if (options.rand_mode == "gauss") { // Fill input and output matrices on host using CUTLASS helper functions cutlass::reference::host::TensorFillRandomGaussian( tensor_a_F32.host_view(), options.seed, double(0), double(5)); // <- Fill matrix A on host with gaussian-distribution random data cutlass::reference::host::TensorFillRandomGaussian( tensor_b_F32.host_view(), options.seed, double(0), double(5)); // <- Fill matrix B on host with gaussian-distribution random data cutlass::reference::host::TensorFillRandomGaussian( tensor_c_F32.host_view(), options.seed, double(0), double(5)); // <- Fill matrix C on host with gaussian-distribution random data } cutlass::reference::host::TensorFill( tensor_d_F32.host_view()); // <- fill matrix D on host with zeros // Copy data from host to GPU tensor_a_F32.sync_device(); tensor_b_F32.sync_device(); tensor_c_F32.sync_device(); tensor_d_F32.sync_device(); //////////////////////////////////////////////////////////////////////////////// /// 2. Initialize F64 tensors using the same values used for F32 //////////////////////////////////////////////////////////////////////////////// // Gemm input operands (A, B, C) cutlass::HostTensor<double, LayoutInputA> tensor_a_F64(problem_size.mk()); // <- Create matrix A with dimensions M x K cutlass::HostTensor<double, LayoutInputB> tensor_b_F64(problem_size.kn()); // <- Create matrix B with dimensions K x N cutlass::HostTensor<double, LayoutOutput> tensor_c_F64(problem_size.mn()); // <- Create matrix C with dimensions M x N // Gemm output (D) for GEMM_F64 cutlass::HostTensor<double, LayoutOutput> tensor_d_F64(problem_size.mn()); // <- Create matrix D with dimensions M x N // Gemm output (D) for GEMM_3xTF32 cutlass::HostTensor<float, LayoutOutput> tensor_d_3xTF32(problem_size.mn()); // <- Create matrix D with dimensions M x N // Gemm output (D) for GEMM_1xTF32 cutlass::HostTensor<float, LayoutOutput> tensor_d_1xTF32(problem_size.mn()); // <- Create matrix D with dimensions M x N // Copy values from the DP tensors cutlass::reference::host::TensorCopy(tensor_a_F64.host_view(), tensor_a_F32.host_view()); cutlass::reference::host::TensorCopy(tensor_b_F64.host_view(), tensor_b_F32.host_view()); cutlass::reference::host::TensorCopy(tensor_c_F64.host_view(), tensor_c_F32.host_view()); cutlass::reference::host::TensorCopy(tensor_d_F64.host_view(), tensor_d_F32.host_view()); cutlass::reference::host::TensorCopy(tensor_d_3xTF32.host_view(), tensor_d_F32.host_view()); cutlass::reference::host::TensorCopy(tensor_d_1xTF32.host_view(), tensor_d_F32.host_view()); // Copy data from host to GPU tensor_a_F64.sync_device(); tensor_b_F64.sync_device(); tensor_c_F64.sync_device(); tensor_d_F64.sync_device(); tensor_d_3xTF32.sync_device(); tensor_d_1xTF32.sync_device(); // Initialize alpha and beta for dot product computation float alpha = float(options.alpha); float beta = float(options.beta); // Split K dimension into 1 partitions int split_k_slices = 1; //////////////////////////////////////////////////////////////////////////////// /// 3. Run 3xTF32 kernel within a profiling loop //////////////////////////////////////////////////////////////////////////////// // Create a tuple of gemm kernel arguments. This is later passed as arguments to launch // instantiated CUTLASS kernel typename Gemm_3xTF32::Arguments arguments_3xtf32{problem_size, // <- problem size of matrix multiplication tensor_a_F32.device_ref(), // <- reference to matrix A on device tensor_b_F32.device_ref(), // <- reference to matrix B on device tensor_c_F32.device_ref(), // <- reference to matrix C on device tensor_d_3xTF32.device_ref(), // <- reference to matrix D on device {alpha, beta}, // <- tuple of alpha and beta split_k_slices}; // <- k-dimension split factor // Using the arguments, query for extra workspace required for matrix multiplication computation size_t workspace_size_3xtf32 = Gemm_3xTF32::get_workspace_size(arguments_3xtf32); // Allocate workspace memory cutlass::device_memory::allocation<uint8_t> workspace_3xtf32(workspace_size_3xtf32); // Instantiate CUTLASS kernel depending on templates Gemm_3xTF32 gemm_op_3xTF32; // Check the problem size is supported or not cutlass::Status status_3xtf32 = gemm_op_3xTF32.can_implement(arguments_3xtf32); CUTLASS_CHECK(status_3xtf32); // Initialize CUTLASS kernel with arguments and workspace pointer status_3xtf32 = gemm_op_3xTF32.initialize(arguments_3xtf32, workspace_3xtf32.get()); CUTLASS_CHECK(status_3xtf32); // Result structure Result result; // // Construct events // cudaEvent_t events[2]; for (auto & event : events) { result.error = cudaEventCreate(&event); if (result.error != cudaSuccess) { std::cerr << "cudaEventCreate() failed: " << cudaGetErrorString(result.error) << std::endl; return false; } } // Record an event at the start of a series of GEMMs result.error = cudaEventRecord(events[0]); if (result.error != cudaSuccess) { std::cerr << "cudaEventRecord() failed: " << cudaGetErrorString(result.error) << std::endl; return false; } // // Run profiling loop // for (int iter = 0; iter < options.iterations; ++iter) { // Launch initialized CUTLASS kernel status_3xtf32 = gemm_op_3xTF32(); CUTLASS_CHECK(status_3xtf32); } // // Stop profiling loop // // Record an event when the GEMMs are complete result.error = cudaEventRecord(events[1]); if (result.error != cudaSuccess) { std::cerr << "cudaEventRecord() failed: " << cudaGetErrorString(result.error) << std::endl; return false; } // Wait for work on the device to complete. result.error = cudaEventSynchronize(events[1]); if (result.error != cudaSuccess) { std::cerr << "cudaEventSynchronize() failed: " << cudaGetErrorString(result.error) << std::endl; return false; } // Measure elapsed runtime float runtime_ms = 0; result.error = cudaEventElapsedTime(&runtime_ms, events[0], events[1]); if (result.error != cudaSuccess) { std::cerr << "cudaEventElapsed() failed: " << cudaGetErrorString(result.error) << std::endl; return false; } // Compute average runtime and GFLOPs. result.m = problem_size.m(); result.n = problem_size.n(); result.k = problem_size.k(); result.runtime_ms = double(runtime_ms) / double(options.iterations); result.gflops = options.gflops(result.runtime_ms / 1000.0); // Cleanup for (auto event : events) { (void)cudaEventDestroy(event); } tensor_d_3xTF32.sync_host(); //////////////////////////////////////////////////////////////////////////////// /// 4. Run TF32 kernel without profiling loop //////////////////////////////////////////////////////////////////////////////// // Create a tuple of gemm kernel arguments. This is later passed as arguments to launch // instantiated CUTLASS kernel typename Gemm_1xTF32::Arguments arguments_1xtf32{problem_size, // <- problem size of matrix multiplication tensor_a_F32.device_ref(), // <- reference to matrix A on device tensor_b_F32.device_ref(), // <- reference to matrix B on device tensor_c_F32.device_ref(), // <- reference to matrix C on device tensor_d_1xTF32.device_ref(), // <- reference to matrix D on device {alpha, beta}, // <- tuple of alpha and beta split_k_slices}; // <- k-dimension split factor // Using the arguments, query for extra workspace required for matrix multiplication computation size_t workspace_size_1xtf32 = Gemm_1xTF32::get_workspace_size(arguments_1xtf32); // Allocate workspace memory cutlass::device_memory::allocation<uint8_t> workspace_1xtf32(workspace_size_1xtf32); // Instantiate CUTLASS kernel depending on templates Gemm_1xTF32 gemm_op_1xtf32; // Check the problem size is supported or not cutlass::Status status_1xtf32 = gemm_op_1xtf32.can_implement(arguments_1xtf32); CUTLASS_CHECK(status_1xtf32); // Initialize CUTLASS kernel with arguments and workspace pointer status_1xtf32 = gemm_op_1xtf32.initialize(arguments_1xtf32, workspace_1xtf32.get()); CUTLASS_CHECK(status_1xtf32); // Launch initialized CUTLASS kernel status_1xtf32 = gemm_op_1xtf32(); CUTLASS_CHECK(status_1xtf32); tensor_d_1xTF32.sync_host(); //////////////////////////////////////////////////////////////////////////////// // Run reference kernel (F64) //////////////////////////////////////////////////////////////////////////////// // Create instantiation for device reference gemm kernel Gemm_F64 gemm_f64; // Launch device reference gemm kernel gemm_f64(problem_size, alpha, tensor_a_F64.device_ref(), tensor_b_F64.device_ref(), beta, tensor_c_F64.device_ref(), tensor_d_F64.device_ref()); // Wait for kernels to finish cudaDeviceSynchronize(); // Copy output data from CUTLASS and reference kernel to host for comparison tensor_d_F64.sync_host(); //////////////////////////////////////////////////////////////////////////////// // Run reference kernel (F32) //////////////////////////////////////////////////////////////////////////////// // Create instantiation for device reference gemm kernel Gemm_F32 gemm_f32; // Launch device reference gemm kernel gemm_f32(problem_size, alpha, tensor_a_F32.device_ref(), tensor_b_F32.device_ref(), beta, tensor_c_F32.device_ref(), tensor_d_F32.device_ref()); // Wait for kernels to finish cudaDeviceSynchronize(); // Copy output data from CUTLASS and reference kernel to host for comparison tensor_d_F32.sync_host(); //////////////////////////////////////////////////////////////////////////////// /////// Compute l2 norms //////////////////////////////////////////////////////////////////////////////// // l2 norm 3xTF32 vs F64 cutlass::HostTensor<double, LayoutOutput> tensor_d_3xTF32_in_F64(problem_size.mn()); cutlass::reference::host::TensorCopy(tensor_d_3xTF32_in_F64.host_view(), tensor_d_3xTF32.host_view()); result.l2_norm_3xtf32_vs_fp64 = cutlass::reference::host::TensorRelativeErrorMetric( tensor_d_3xTF32_in_F64.host_view(), tensor_d_F64.host_view()); // l2 norm 1xTF32 vs F64 cutlass::HostTensor<double, LayoutOutput> tensor_d_1xTF32_in_F64(problem_size.mn()); cutlass::reference::host::TensorCopy(tensor_d_1xTF32_in_F64.host_view(), tensor_d_1xTF32.host_view()); result.l2_norm_1xtf32_vs_fp64 = cutlass::reference::host::TensorRelativeErrorMetric( tensor_d_1xTF32_in_F64.host_view(), tensor_d_F64.host_view()); // l2 norm F32 vs F64 cutlass::HostTensor<double, LayoutOutput> tensor_d_F32_in_F64(problem_size.mn()); cutlass::reference::host::TensorCopy(tensor_d_F32_in_F64.host_view(), tensor_d_F32.host_view()); result.l2_norm_fp32_vs_fp64 = cutlass::reference::host::TensorRelativeErrorMetric( tensor_d_F32_in_F64.host_view(), tensor_d_F64.host_view()); results.push_back(result); /////////////////////////////////////////////////////////////////////////////// // Check if output from CUTLASS kernel and reference kernel are equal or not std::cout << std::fixed; std::cout.precision(4); std::cout << "Runtime: " << result.runtime_ms << " ms" << std::endl; std::cout.precision(2); std::cout << "GFLOPs: " << result.gflops << std::endl; std::cout << "Normalized L2 norm of" << std::endl; std::cout.precision(8); std::cout << std::scientific << " - 3xTF32 error with FP64 reference : " << result.l2_norm_3xtf32_vs_fp64 << std::endl << " - 1xTF32 error with FP64 reference : " << result.l2_norm_1xtf32_vs_fp64 << std::endl << " - FP32 error with FP64 reference : " << result.l2_norm_fp32_vs_fp64 << std::endl; return true; } int main(int argc, const char **argv) { bool notSupported = false; // Ampere Tensor Core operations exposed with mma.sync and ldmatrix are first available // in CUDA 11.0. // // CUTLASS must be compiled with CUDA 11.0 Toolkit to run these examples. if (!(__CUDACC_VER_MAJOR__ >= 11)) { std::cerr << "Ampere Tensor Core operations must be compiled with CUDA 11.0 Toolkit or later." << std::endl; notSupported = true; } cudaDeviceProp props; cudaError_t error = cudaGetDeviceProperties(&props, 0); if (error != cudaSuccess) { std::cerr << "cudaGetDeviceProperties() returned an error: " << cudaGetErrorString(error) << std::endl; return -1; } if (!((props.major * 10 + props.minor) >= 80)) { std::cerr << "Ampere Tensor Core operations must be run on a machine with compute capability at least 80." << std::endl; notSupported = true; } if (notSupported) { // Returning zero so this test passes on older Toolkits. Its actions are no-op. return 0; } Options options; options.parse(argc, argv); if (options.help) { options.print_usage(std::cout) << std::endl; return 0; } bool result = true; if (options.benchmark) { for (int k = 4; k <= 65536; k *= 2) { options.problem_size[2] = k; printf("Gemm problem size: %d x %d x %d\n", \ options.problem_size.m(), options.problem_size.n(), options.problem_size.k()); if (!options.valid()) { std::cerr << "Invalid problem." << std::endl; return -1; } result &= run(options); } } else { // Execute one problem size if (!options.valid()) { std::cerr << "Invalid problem." << std::endl; return -1; } result = run(options); } if (!result) return -1; std::cout << std::endl << "CSV results" << std::endl; Result::print_csv_header(); for(auto &r : results) r.print_csv_row(); return 0; }
examples/27_ampere_3xtf32_fast_accurate_tensorop_gemm/27_ampere_3xtf32_fast_accurate_tensorop_gemm.cu/0
{ "file_path": "examples/27_ampere_3xtf32_fast_accurate_tensorop_gemm/27_ampere_3xtf32_fast_accurate_tensorop_gemm.cu", "repo_id": "examples", "token_count": 12989 }
5
/*************************************************************************************************** * Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * **************************************************************************************************/ /*! \file \brief Grouped FMHA kernel */ #pragma once #include "cutlass/cutlass.h" #include "cutlass/fast_math.h" #include "cutlass/gemm/gemm.h" #include "cutlass/matrix_coord.h" #include "cutlass/complex.h" #include "cutlass/semaphore.h" #include "cutlass/layout/matrix.h" #include "cutlass/trace.h" #include "cutlass/gemm/kernel/gemm_transpose_operands.h" #include "fmha_grouped_problem_visitor.h" #include "gemm_kernel_utils.h" #include "gemm/mma_accum_lambda_iterator.h" #include "epilogue/epilogue_rescale_output.h" namespace { static CUTLASS_DEVICE float atomicMaxFloat(float* addr, float value) { // source: https://stackoverflow.com/a/51549250 return (value >= 0) ? __int_as_float(atomicMax((int*)addr, __float_as_int(value))) : __uint_as_float(atomicMin((unsigned int*)addr, __float_as_uint(value))); } } ///////////////////////////////////////////////////////////////////////////////////////////////// namespace cutlass { namespace gemm { namespace kernel { ///////////////////////////////////////////////////////////////////////////////////////////////// template < typename MM0_, ///! Structure for computing P = Q @ K typename MM1_, ///! Structure for computing O = P @ V typename scalar_t_, typename accum_t_, typename output_t_, typename output_accum_t_, bool kKeepOutputInRF, ///! Whether the intermediate output from MM0_ should be kept in the register file GroupScheduleMode GroupScheduleMode_ ///! Type of scheduling to perform > struct FMHAGrouped { public: using MM0 = MM0_; using MM1 = MM1_; using scalar_t = scalar_t_; using accum_t = accum_t_; using output_t = output_t_; using output_accum_t = output_accum_t_; static GroupScheduleMode const kGroupScheduleMode = GroupScheduleMode_; static constexpr bool kNeedsOutputAccumulatorBuffer = !kKeepOutputInRF && !cutlass::platform::is_same<output_accum_t, output_t>::value; // Parameters to satisfy BaseGrouped using ElementA = scalar_t; using ElementB = scalar_t; using ElementC = accum_t; using LayoutA = typename MM0::LayoutA; using LayoutB = typename MM0::ElementB; using LayoutC = typename MM1::ElementC; static ComplexTransform const kTransformA = ComplexTransform::kNone; static ComplexTransform const kTransformB = ComplexTransform::kNone; static int const kAlignmentA = MM0::kAlignmentA; static int const kAlignmentB = MM0::kAlignmentB; static int const kAlignmentC = 1; using Mma = typename MM1::Mma; using EpilogueOutputOp = typename MM1::EpilogueOutputOp; using ThreadblockSwizzle = void; using Operator = typename MM1::Operator; using WarpShape = typename MM1::WarpShape; using InstructionShape = typename MM1::InstructionShape; using ElementQ = scalar_t; using ElementK = scalar_t; using ElementP = accum_t; using ElementV = scalar_t; using ElementO = output_t; using ElementOAccum = output_accum_t; using ElementAccumulator = accum_t; using LayoutQ = typename MM0::LayoutA; using LayoutK = typename MM0::LayoutB; using LayoutP = typename MM0::LayoutC; using LayoutV = typename MM1::LayoutB; using LayoutO = typename MM1::LayoutC; static bool const kPreloadV = (MM1::Mma::ArchTag::kMinComputeCapability >= 80 && cutlass::sizeof_bits<ElementV>::value == 16); static int const kAlignmentQ = MM0::kAlignmentA; static int const kAlignmentK = MM0::kAlignmentB; static int const kAlignmentV = 1; using ThreadblockShape = typename MM0::ThreadblockShape; static int const kQueriesPerBlock = ThreadblockShape::kM; static int const kKeysPerBlock = ThreadblockShape::kN; static constexpr bool kSupportsDropout = false; static constexpr bool kSupportsBias = false; /// Warp count (concept: GemmShape) using WarpCount = typename MM1::WarpCount; static int const kThreadsPerWarp = 32; static int const kThreadCount = kThreadsPerWarp * WarpCount::kCount; static constexpr int kNumWarpsPerBlock = kQueriesPerBlock * kKeysPerBlock / (kThreadsPerWarp * kThreadsPerWarp); using ProblemVisitor = FMHAGroupedProblemVisitor< ThreadblockShape, kGroupScheduleMode, kThreadCount, kThreadCount>; // // Structures // /// Argument structure struct Arguments { // // Data members // GemmCoord *problem_sizes0{nullptr}; GemmCoord *problem_sizes1{nullptr}; int problem_count{0}; int threadblock_count{0}; ElementQ ** ptr_Q{nullptr}; ElementK ** ptr_K{nullptr}; ElementP ** ptr_P{nullptr}; ElementV ** ptr_V{nullptr}; ElementO ** ptr_O{nullptr}; ElementOAccum ** ptr_O_accum{nullptr}; typename LayoutQ::Stride::LongIndex *ldq{nullptr}; typename LayoutK::Stride::LongIndex *ldk{nullptr}; typename LayoutP::Stride::LongIndex *ldv{nullptr}; typename LayoutO::Stride::LongIndex *ldo{nullptr}; // Whether causal masking is to be performed bool causal{false}; // Scale ElementAccumulator scale{0}; // Only used by device-level operator GemmCoord *host_problem_sizes{nullptr}; // // Methods // /// Default ctor Arguments() = default; /// Ctor CUTLASS_HOST_DEVICE Arguments( GemmCoord *problem_sizes0, GemmCoord *problem_sizes1, int problem_count, int threadblock_count, ElementQ ** ptr_Q, ElementK ** ptr_K, ElementP ** ptr_P, ElementV ** ptr_V, ElementO ** ptr_O, ElementOAccum ** ptr_O_accum, typename LayoutQ::Stride::LongIndex *ldq, typename LayoutK::Stride::LongIndex *ldk, typename LayoutP::Stride::LongIndex *ldp, typename LayoutV::Stride::LongIndex *ldv, typename LayoutO::Stride::LongIndex *ldo, bool causal, ElementAccumulator scale, GemmCoord *host_problem_sizes=nullptr ): problem_sizes0(problem_sizes0), problem_sizes1(problem_sizes1), problem_count(problem_count), threadblock_count(threadblock_count), ptr_Q(ptr_Q), ptr_K(ptr_K), ptr_P(ptr_P), ptr_V(ptr_V), ptr_O(ptr_O), ptr_O_accum(kNeedsOutputAccumulatorBuffer ? ptr_O_accum : (accum_t**)ptr_O), ldq(ldq), ldk(ldk), ldv(ldv), ldo(ldo), causal(causal), scale(scale), host_problem_sizes(host_problem_sizes) { } bool __host__ check_supported() { CHECK_ALIGNED_PTR(ptr_Q, kAlignmentQ); CHECK_ALIGNED_PTR(ptr_K, kAlignmentK); CHECK_ALIGNED_PTR(ptr_V, kAlignmentV); XFORMERS_CHECK(ldq % kAlignmentQ == 0, "query is not correctly aligned"); XFORMERS_CHECK(ldk % kAlignmentK == 0, "key is not correctly aligned"); XFORMERS_CHECK(ldv % kAlignmentV == 0, "value is not correctly aligned"); return true; } }; // // Structure for precomputing values in host memory and passing to kernels // /// Parameters structure struct Params { typename ProblemVisitor::Params problem_visitor; int threadblock_count; ElementQ ** ptr_Q; ElementK ** ptr_K; ElementP ** ptr_P; ElementV ** ptr_V; ElementO ** ptr_O; ElementOAccum ** ptr_O_accum; typename LayoutQ::Stride::LongIndex *ldq; typename LayoutK::Stride::LongIndex *ldk; typename LayoutP::Stride::LongIndex *ldv; typename LayoutO::Stride::LongIndex *ldo; ElementAccumulator scale; bool causal; // // Methods // CUTLASS_HOST_DEVICE Params(): ptr_Q(nullptr), ptr_K(nullptr), ptr_P(nullptr), ptr_V(nullptr), ptr_O(nullptr), ptr_O_accum(nullptr), ldq(nullptr), ldk(nullptr), ldv(nullptr), ldo(nullptr), causal(false), scale(0) { } CUTLASS_HOST_DEVICE Params(Arguments const &args, void *workspace = nullptr, int tile_count = 0): problem_visitor(args.problem_sizes0, args.problem_sizes1, args.problem_count, workspace, tile_count), threadblock_count(args.threadblock_count), ptr_Q(args.ptr_Q), ptr_K(args.ptr_K), ptr_P(args.ptr_P), ptr_V(args.ptr_V), ptr_O(args.ptr_O), ptr_O_accum(kNeedsOutputAccumulatorBuffer ? args.ptr_O_accum : (accum_t**)args.ptr_O), ldq(args.ldq), ldk(args.ldk), ldv(args.ldv), ldo(args.ldo), causal(args.causal), scale(args.scale) { } CUTLASS_HOST_DEVICE void update( Arguments const &args, void *workspace = nullptr, int tile_count = 0) { problem_visitor = typename ProblemVisitor::Params(args.problem_sizes0, args.problem_sizes1, args.problem_count, workspace, tile_count); threadblock_count = args.threadblock_count; ptr_Q = args.ptr_Q; ptr_K = args.ptr_K; ptr_P = args.ptr_P; ptr_V = args.ptr_V; ptr_O = args.ptr_O; ptr_O_accum = kNeedsOutputAccumulatorBuffer ? args.ptr_O_accum : (accum_t**)args.ptr_O; ldq = args.ldq; ldk = args.ldk; ldv = args.ldv; ldo = args.ldo; causal = args.causal; scale = args.scale; } }; // Shared storage - depends on kernel params struct ScalingCoefs { cutlass::Array<ElementAccumulator, kQueriesPerBlock> m_prime; cutlass::Array<ElementAccumulator, kQueriesPerBlock> s_prime; cutlass::Array<ElementAccumulator, kQueriesPerBlock> mi; cutlass::Array<ElementAccumulator, kQueriesPerBlock> out_rescale; cutlass::Array<ElementAccumulator, kQueriesPerBlock * MM0::MmaCore::WarpCount::kN> addition_storage; }; struct SharedStorageEpilogueAtEnd : ScalingCoefs { struct SharedStorageAfterMM0 { // Everything here might be overwritten during MM0 typename MM0::AccumulatorSharedStorage si; typename MM1::Mma::SharedStorage mm1; }; union { typename MM0::Mma::SharedStorage mm0; SharedStorageAfterMM0 after_mm0; typename MM1::DefaultEpilogue::SharedStorage epilogue; }; CUTLASS_DEVICE typename MM1::DefaultEpilogue::SharedStorage& epilogue_shared_storage() { return epilogue; } // ProblemVisitor shared storage can't be overlapped with others typename ProblemVisitor::SharedStorage problem_visitor; }; struct SharedStorageEpilogueInLoop : ScalingCoefs { struct SharedStorageAfterMM0 { // Everything here might be overwritten during MM0 typename MM0::AccumulatorSharedStorage si; typename MM1::Mma::SharedStorage mm1; typename MM1::DefaultEpilogue::SharedStorage epilogue; }; union { typename MM0::Mma::SharedStorage mm0; SharedStorageAfterMM0 after_mm0; }; CUTLASS_DEVICE typename MM1::DefaultEpilogue::SharedStorage& epilogue_shared_storage() { return after_mm0.epilogue; } // ProblemVisitor shared storage can't be overlapped with others typename ProblemVisitor::SharedStorage problem_visitor; }; using SharedStorage = typename cutlass::platform::conditional< kKeepOutputInRF, SharedStorageEpilogueAtEnd, SharedStorageEpilogueInLoop>::type; private: // Parameters to be used by an individual tile struct TileParams { CUTLASS_HOST_DEVICE static int query_start(int threadblock_idx) { return threadblock_idx * kQueriesPerBlock; } // Returns whether this threadblock computes within the number of queries, // which is determined by the M dimension of problem 0 CUTLASS_HOST_DEVICE static bool can_compute(int threadblock_idx, const GemmCoord& problem_size0) { return query_start(threadblock_idx) < problem_size0.m(); } CUTLASS_HOST_DEVICE static int num_queries(int threadblock_idx, const GemmCoord& problem_size0) { return problem_size0.m() - query_start(threadblock_idx); } CUTLASS_HOST_DEVICE static int num_keys(int threadblock_idx, const GemmCoord& problem_size0, bool causal) { int nk = problem_size0.n(); if (causal) { nk = cutlass::fast_min(int32_t(query_start(threadblock_idx) + kQueriesPerBlock), nk); } return nk; } }; public: // // Methods // CUTLASS_DEVICE FMHAGrouped() { } /// Determines whether kernel satisfies alignment static Status can_implement(cutlass::gemm::GemmCoord const & problem_size) { return Status::kSuccess; } static Status can_implement(Arguments const &args) { return Status::kSuccess; } static CUTLASS_DEVICE int16_t thread_id() { return threadIdx.x; } static CUTLASS_DEVICE int8_t warp_id() { return threadIdx.x / kThreadsPerWarp; } static CUTLASS_DEVICE int8_t lane_id() { return threadIdx.x % kThreadsPerWarp; } /// Executes one GEMM CUTLASS_DEVICE void operator()(Params const &params, SharedStorage &shared_storage) { auto& m_prime = shared_storage.m_prime; auto& s_prime = shared_storage.s_prime; [[maybe_unused]] auto& si = shared_storage.after_mm0.si; auto& mi = shared_storage.mi; auto& out_rescale = shared_storage.out_rescale; ProblemVisitor problem_visitor( params.problem_visitor, shared_storage.problem_visitor, blockIdx.x); // Outer 'persistent' loop to iterate over tiles while (problem_visitor.next_tile()) { GemmCoord problem_size0 = problem_visitor.problem_size0(); GemmCoord problem_size1 = problem_visitor.problem_size1(); const int32_t threadblock_idx = int32_t(problem_visitor.threadblock_idx()); if (!TileParams::can_compute(threadblock_idx, problem_size0)) { problem_visitor.advance(gridDim.x); continue; } const int32_t problem_idx = problem_visitor.problem_index(); if (thread_id() < kQueriesPerBlock) { s_prime[thread_id()] = ElementAccumulator(0); out_rescale[thread_id()] = accum_t(1.0); m_prime[thread_id()] = -cutlass::platform::numeric_limits<ElementAccumulator>::infinity(); mi[thread_id()] = -cutlass::platform::numeric_limits<ElementAccumulator>::infinity(); } ElementO *ptr_O = params.ptr_O[problem_idx] + TileParams::query_start(threadblock_idx) * params.ldo[problem_idx]; ElementOAccum *ptr_O_accum = params.ptr_O_accum[problem_idx] + TileParams::query_start(threadblock_idx) * params.ldo[problem_idx]; const int num_queries = TileParams::num_queries(threadblock_idx, problem_size0); auto createOutputIter = [&](int col) -> typename MM1::OutputTileIterator { using OutputTileIterator = typename MM1::OutputTileIterator; return OutputTileIterator( typename OutputTileIterator::Params{(int32_t)params.ldo[problem_idx]}, ptr_O, typename OutputTileIterator::TensorCoord{ num_queries, problem_size1.n()}, thread_id(), {0, col}); }; auto createOutputAccumIter = [&](int col) -> typename MM1::OutputTileIteratorAccum { using OutputTileIteratorAccum = typename MM1::OutputTileIteratorAccum; return OutputTileIteratorAccum( typename OutputTileIteratorAccum::Params{(int32_t)params.ldo[problem_idx]}, ptr_O_accum, typename OutputTileIteratorAccum::TensorCoord{ num_queries, problem_size1.n()}, thread_id(), {0, col}); }; typename MM1::Mma::FragmentC accum_o; accum_o.clear(); const int num_keys = TileParams::num_keys(threadblock_idx, problem_size0, params.causal); for (int32_t iter_key_start = 0; iter_key_start < num_keys; iter_key_start += kKeysPerBlock) { int32_t problem_size_0_m = cutlass::fast_min((int32_t)kQueriesPerBlock, num_queries); int32_t problem_size_0_n = cutlass::fast_min( (int32_t)kKeysPerBlock, num_keys - iter_key_start); int32_t const& problem_size_0_k = problem_size0.k(); int32_t const& problem_size_1_n = problem_size1.n(); int32_t const& problem_size_1_k = problem_size_0_n; auto prologueV = [&](int blockN) { typename MM1::Mma::IteratorB iterator_V( typename MM1::IteratorB::Params{MM1::LayoutB(params.ldv[problem_idx])}, params.ptr_V[problem_idx] + iter_key_start * params.ldv[problem_idx], {problem_size_1_k, problem_size_1_n}, thread_id(), cutlass::MatrixCoord{0, blockN * MM1::Mma::Shape::kN}); MM1::Mma::prologue( shared_storage.after_mm0.mm1, iterator_V, thread_id(), problem_size_1_k); }; __syncthreads(); // Need to have shared memory initialized, and `m_prime` // updated from end of prev iter // // MATMUL: Q.K_t // // Computes the block-matrix product of: // (a) query[query_start:query_end, :] // with // (b) key[iter_key_start:iter_key_start + kKeysPerBlock] // and stores that into `shared_storage.si` // ElementQ *ptr_Q = params.ptr_Q[problem_idx] + TileParams::query_start(threadblock_idx) * params.ldq[problem_idx]; // Construct iterators to A and B operands typename MM0::IteratorA iterator_A( typename MM0::IteratorA::Params( typename MM0::MmaCore::LayoutA(params.ldq[problem_idx])), ptr_Q, {problem_size_0_m, problem_size_0_k}, thread_id(), {0, 0}); typename MM0::IteratorB iterator_B( typename MM0::IteratorB::Params( typename MM0::MmaCore::LayoutB(params.ldk[problem_idx])), params.ptr_K[problem_idx] + iter_key_start * params.ldk[problem_idx], {problem_size_0_k, problem_size_0_n}, thread_id(), {0, 0}); // Construct thread-scoped matrix multiply typename MM0::Mma mma( shared_storage.mm0, thread_id(), warp_id(), lane_id()); typename MM0::Mma::FragmentC accum; accum.clear(); auto gemm_k_iterations = (problem_size_0_k + MM0::Mma::Shape::kK - 1) / MM0::Mma::Shape::kK; // Compute threadblock-scoped matrix multiply-add mma(gemm_k_iterations, accum, iterator_A, iterator_B, accum); __syncthreads(); if (kPreloadV) { prologueV(0); } else { MM1::Mma::drain_cp_asyncs(); } typename MM0::Mma::Operator::IteratorC::TensorCoord iteratorC_tile_offset = { (warp_id() % MM0::Mma::WarpCount::kM), (warp_id() / MM0::Mma::WarpCount::kM) }; // Mask out last if causal if (params.causal && num_keys - iter_key_start <= kKeysPerBlock) { auto lane_offset = MM0::AccumLambdaIterator::get_lane_offset( lane_id(), warp_id(), iteratorC_tile_offset); int32_t last_col; MM0::AccumLambdaIterator::iterateRows( lane_offset, [&](int accum_m) { last_col = TileParams::query_start(threadblock_idx) + accum_m - iter_key_start; }, [&](int accum_m, int accum_n, int idx) { if (accum_n > last_col) { accum[idx] = -cutlass::platform::numeric_limits<accum_t>::infinity(); } }, [&](int accum_m) {}); } // DISPATCH_BOOL(iter_key_start == 0, kIsFirst, ([&] { // DISPATCH_BOOL( // num_keys - iter_key_start >= kKeysPerBlock, // kFullColumns, // ([&] { // // Update `mi` from accum stored in registers // // Also does accum[i] <- exp(accum[i] - mi) // iterative_softmax< // typename MM0::Mma::Operator::IteratorC, // kFullColumns, // kIsFirst>( // accum_o, // accum, // mi, // m_prime, // s_prime, // lane_id(), // thread_id(), // warp_id(), // num_keys - iter_key_start, // iteratorC_tile_offset, // kSupportsBias ? 1.0f : params.scale); // })); // })); // Update `mi` from accum stored in registers // Also does accum[i] <- exp(accum[i] - mi) iterative_softmax<typename MM0::Mma::Operator::IteratorC>( accum_o, accum, mi, m_prime, s_prime, out_rescale, shared_storage.addition_storage, lane_id(), thread_id(), warp_id(), num_keys - iter_key_start, iter_key_start == 0, iteratorC_tile_offset, kSupportsBias ? 1.0f : params.scale); // Output results to shared-memory int warp_idx_mn_0 = warp_id() % (MM0::Mma::Base::WarpCount::kM * MM0::Mma::Base::WarpCount::kN); auto output_tile_coords = cutlass::MatrixCoord{ warp_idx_mn_0 % MM0::Mma::Base::WarpCount::kM, warp_idx_mn_0 / MM0::Mma::Base::WarpCount::kM}; MM0::B2bGemm::accumToSmem( shared_storage.after_mm0.si, accum, lane_id(), output_tile_coords); __syncthreads(); // // MATMUL: Attn . V // Run the matmul `attn @ V` for a block of attn and V. // `attn` is read from shared memory (in `shared_storage_si`) // `V` is read from global memory (with iterator_B) // const int64_t nBlockN = kKeepOutputInRF ? 1 : ceil_div( (int64_t)problem_size_1_n, int64_t(MM1::ThreadblockShape::kN)); // Iterate over the N dimension of GEMM1 for (int blockN = 0; blockN < nBlockN; ++blockN) { int gemm_k_iterations = (problem_size_1_k + MM1::Mma::Shape::kK - 1) / MM1::Mma::Shape::kK; // Compute threadblock-scoped matrix multiply-add and store it in accum // (in registers) if (!kPreloadV) { __syncthreads(); // we share shmem between mma and epilogue } typename MM1::Mma::IteratorB iterator_V( typename MM1::IteratorB::Params{MM1::LayoutB(params.ldv[problem_idx])}, params.ptr_V[problem_idx] + iter_key_start * params.ldv[problem_idx], {problem_size_1_k, problem_size_1_n}, thread_id(), cutlass::MatrixCoord{0, blockN * MM1::Mma::Shape::kN}); typename MM1::Mma mma_pv( // operand A: Pij_dropped in shared memory shared_storage.after_mm0.si.accum_ref(), // operand B: shared memory staging area for Vj, which is loaded // from global memory shared_storage.after_mm0.mm1.operand_B_ref(), (int)thread_id(), (int)warp_id(), (int)lane_id()); mma_pv.set_prologue_done(kPreloadV); if (!kKeepOutputInRF) { accum_o.clear(); } mma_pv(gemm_k_iterations, accum_o, iterator_V, accum_o); __syncthreads(); if (kPreloadV && !kKeepOutputInRF && blockN + 1 < nBlockN) { prologueV(blockN + 1); } if (!kKeepOutputInRF) { MM1::Mma::drain_cp_asyncs(); DISPATCH_BOOL( iter_key_start == 0, kIsFirst, ([&] { DISPATCH_BOOL( (iter_key_start + kKeysPerBlock) >= num_keys, kIsLast, ([&] { using DefaultEpilogue = typename MM1::DefaultEpilogue; using DefaultOp = typename MM1::DefaultConfig::EpilogueOutputOp; using ElementCompute = typename DefaultOp::ElementCompute; using EpilogueOutputOp = typename cutlass::epilogue:: thread::MemoryEfficientAttentionNormalize< typename cutlass::platform::conditional< kIsLast, output_t, output_accum_t>::type, output_accum_t, DefaultOp::kCount, typename DefaultOp::ElementAccumulator, output_accum_t, kIsFirst, kIsLast, cutlass::Array<ElementCompute, kQueriesPerBlock>>; using Epilogue = typename cutlass::epilogue::threadblock:: EpiloguePipelined< typename DefaultEpilogue::Shape, typename MM1::Mma::Operator, DefaultEpilogue::kPartitionsK, typename cutlass::platform::conditional< kIsLast, typename MM1::OutputTileIterator, typename MM1::OutputTileIteratorAccum>::type, typename DefaultEpilogue:: AccumulatorFragmentIterator, typename DefaultEpilogue::WarpTileIterator, typename DefaultEpilogue::SharedLoadIterator, EpilogueOutputOp, typename DefaultEpilogue::Padding, DefaultEpilogue::kFragmentsPerIteration, true, // IterationsUnroll typename MM1::OutputTileIteratorAccum // Read // iterator >; int col = blockN * MM1::Mma::Shape::kN; auto source_iter = createOutputAccumIter(col); auto dest_iter = gemm_kernel_utils::call_conditional< kIsLast, decltype(createOutputIter), decltype(createOutputAccumIter)>:: apply(createOutputIter, createOutputAccumIter, col); EpilogueOutputOp rescale(s_prime, out_rescale); Epilogue epilogue( shared_storage.epilogue_shared_storage(), thread_id(), warp_id(), lane_id()); epilogue(rescale, dest_iter, accum_o, source_iter); })); })); if (!kKeepOutputInRF) { __syncthreads(); } } } __syncthreads(); // we modify `m_prime` after } if (kKeepOutputInRF) { const bool kIsFirst = true; const bool kIsLast = true; using DefaultEpilogue = typename MM1::DefaultEpilogue; using DefaultOp = typename MM1::DefaultConfig::EpilogueOutputOp; using ElementCompute = typename DefaultOp::ElementCompute; using EpilogueOutputOp = typename cutlass::epilogue::thread::MemoryEfficientAttentionNormalize< output_t, // output output_accum_t, // source DefaultOp::kCount, typename DefaultOp::ElementAccumulator, // accum output_accum_t, // compute kIsFirst, kIsLast, cutlass::Array<ElementCompute, kQueriesPerBlock>>; using Epilogue = typename cutlass::epilogue::threadblock::EpiloguePipelined< typename DefaultEpilogue::Shape, typename MM1::Mma::Operator, DefaultEpilogue::kPartitionsK, typename MM1::OutputTileIterator, // destination typename DefaultEpilogue::AccumulatorFragmentIterator, typename DefaultEpilogue::WarpTileIterator, typename DefaultEpilogue::SharedLoadIterator, EpilogueOutputOp, typename DefaultEpilogue::Padding, DefaultEpilogue::kFragmentsPerIteration, true, // IterationsUnroll typename MM1::OutputTileIteratorAccum // source tile >; auto dest_iter = createOutputIter(0); EpilogueOutputOp rescale(s_prime, out_rescale); Epilogue epilogue( shared_storage.epilogue_shared_storage(), thread_id(), warp_id(), lane_id()); MM1::Mma::drain_cp_asyncs(); epilogue(rescale, dest_iter, accum_o); } // Next tile problem_visitor.advance(gridDim.x); __syncthreads(); // Don't start the next iteration until all threads are done using shared memory. } } template <typename WarpIteratorC> CUTLASS_DEVICE static void iterative_softmax( typename WarpIteratorC::Fragment& frag_o, // output so far typename WarpIteratorC::Fragment& frag, cutlass::Array<accum_t, kQueriesPerBlock>& mi, cutlass::Array<accum_t, kQueriesPerBlock>& m_prime, cutlass::Array<accum_t, kQueriesPerBlock>& s_prime, cutlass::Array<accum_t, kQueriesPerBlock>& out_rescale, cutlass::Array<accum_t, kQueriesPerBlock * MM0::MmaCore::WarpCount::kN>& addition_storage, int8_t lane_id, int8_t thread_id, int8_t warp_id, int max_col, bool is_first, typename WarpIteratorC::TensorCoord const& tile_offset, float scaling) { /* Iterates on the accumulator and corresponding position on result matrix (1) Update `mi[r]` to the max value of the row `r` (2) In a second iteration do the following: (a) accum <- exp(accum - mi) (b) m_prime <- exp(m_prime - mi) (c) s_prime <- s_prime * m_prime + sum(accum) All of this is done on registers, before we store all of this on shared memory for the next matmul with Value. */ using Fragment = typename WarpIteratorC::Fragment; using LambdaIterator = typename DefaultMmaAccumLambdaIterator< WarpIteratorC, accum_t, kThreadsPerWarp>::Iterator; // Convert to `accum_t` (rather than double) constexpr float kLog2e = 1.4426950408889634074; // log_2(e) = M_LOG2E static_assert(kQueriesPerBlock % kNumWarpsPerBlock == 0, ""); static constexpr int kLinesPerWarp = kQueriesPerBlock / kNumWarpsPerBlock; frag = cutlass::multiplies<Fragment>()(scaling * kLog2e, frag); auto lane_offset = LambdaIterator::get_lane_offset(lane_id, warp_id, tile_offset); // First update `mi` to the max per-row { accum_t max; LambdaIterator::iterateRows( lane_offset, [&](int accum_m) { max = -cutlass::platform::numeric_limits<accum_t>::infinity(); }, [&](int accum_m, int accum_n, int idx) { if (accum_n < max_col) { max = cutlass::fast_max(max, frag[idx]); } }, [&](int accum_m) { // Having 4x atomicMax seems faster than reduce within warp // first... atomicMaxFloat(&mi[accum_m], max); }); } // Make sure we all share the update values for `mi` __syncthreads(); // Doing this `exp` is quite expensive. Let's // split it across the warps bool restore_mi_to_minus_inf = false; if (lane_id < kLinesPerWarp) { int id = warp_id * kLinesPerWarp + lane_id; auto m_prime_id = m_prime[id]; auto mi_id = mi[id]; bool changed = m_prime_id < mi_id; // `false` if both are -inf if (changed) { auto m_prime_exp = exp2f(m_prime_id - mi_id); out_rescale[id] = m_prime_exp; s_prime[id] *= m_prime_exp; } else { // Only when bias is enabled, it's possible that all the first values // of attention are masked to `-inf`. In that case we want to avoid // `nan = exp2f(-inf - (-inf))` so we temporarily set `mi` to 0 if (kSupportsBias && mi_id == -cutlass::platform::numeric_limits<accum_t>::infinity()) { restore_mi_to_minus_inf = true; mi[id] = 0.0f; } out_rescale[id] = 1.0f; } } __syncthreads(); // Update output fragments if (kKeepOutputInRF && !is_first) { accum_t line_rescale; LambdaIterator::iterateRows( lane_offset, [&](int accum_m) { line_rescale = out_rescale[accum_m]; }, [&](int accum_m, int accum_n, int idx) { frag_o[idx] = frag_o[idx] * line_rescale; }, [&](int accum_m) {}); } // Update accum_m, accum_n, ... { accum_t mi_row, total_row; LambdaIterator::iterateRows( lane_offset, [&](int accum_m) { mi_row = mi[accum_m]; }, [&](int accum_m, int accum_n, int idx) { frag[idx] = (accum_n < max_col) ? exp2f(frag[idx] - mi_row) : accum_t(0.0); }, [&](int accum_m) {}); LambdaIterator::iterateRows( lane_offset, [&](int accum_m) { total_row = 0.0; }, [&](int accum_m, int accum_n, int idx) { total_row += frag[idx]; }, [&](int accum_m) { if (LambdaIterator::reduceSameRow( lane_id, total_row, [](accum_t a, accum_t b) { return a + b; })) { // NOTE: we could atomically add `total_row` to `s_prime`, but // it's faster (and deterministic) to avoid atomics here addition_storage [accum_m + kQueriesPerBlock * tile_offset.column()] = total_row; } }); } __syncthreads(); if (lane_id < kLinesPerWarp) { int id = warp_id * kLinesPerWarp + lane_id; accum_t total_row = s_prime[id]; if (restore_mi_to_minus_inf) { // Restore `mi`, see above when we set `restore_mi_to_minus_inf=true` mi[id] = -cutlass::platform::numeric_limits<accum_t>::infinity(); } else { m_prime[id] = mi[id]; } CUTLASS_PRAGMA_UNROLL for (int i = 0; i < MM0::MmaCore::WarpCount::kN; ++i) { total_row += addition_storage[id + kQueriesPerBlock * i]; } s_prime[id] = total_row; } } }; ///////////////////////////////////////////////////////////////////////////////////////////////// } // namespace kernel } // namespace gemm } // namespace cutlass /////////////////////////////////////////////////////////////////////////////////////////////////
examples/41_fused_multi_head_attention/fmha_grouped.h/0
{ "file_path": "examples/41_fused_multi_head_attention/fmha_grouped.h", "repo_id": "examples", "token_count": 17648 }
6
"/**************************************************************************************************(...TRUNCATED)
examples/41_fused_multi_head_attention/iterators/predicated_tile_access_iterator_residual_last.h/0
{"file_path":"examples/41_fused_multi_head_attention/iterators/predicated_tile_access_iterator_resid(...TRUNCATED)
7
"/**************************************************************************************************(...TRUNCATED)
examples/44_multi_gemm_ir_and_codegen/fixed_impl/epilogue/threadblock/fused_bias_act_epilogue.h/0
{"file_path":"examples/44_multi_gemm_ir_and_codegen/fixed_impl/epilogue/threadblock/fused_bias_act_e(...TRUNCATED)
8
"#################################################################################################\n(...TRUNCATED)
examples/44_multi_gemm_ir_and_codegen/ir_gen/replace_fix_impl_header.py/0
{"file_path":"examples/44_multi_gemm_ir_and_codegen/ir_gen/replace_fix_impl_header.py","repo_id":"ex(...TRUNCATED)
9
End of preview. Expand in Data Studio
README.md exists but content is empty.
Downloads last month
42